drivers/clocksource/mxs_timer.c

77

HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

201

mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

226

mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

271

mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

274

mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

687

mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

689

mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);

drivers/dma/mxs-dma.c

694

mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

162

adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

170

writel(chan, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

176

adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

177

writel(BIT(0), adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

440

const u32 st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;

drivers/iio/adc/mxs-lradc-adc.c

512

writel(ctrl4_set, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

513

writel(ctrl1_irq, adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);

drivers/iio/adc/mxs-lradc-adc.c

515

adc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

103

ts->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

285

ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

307

ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

333

ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

359

ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

376

ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

384

ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

452

ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);

drivers/input/touchscreen/mxs-lradc-ts.c

572

ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);

drivers/mmc/host/mxs-mmc.c

521

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/mmc/host/mxs-mmc.c

523

ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);

drivers/nvmem/mxs-ocotp.c

77

writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET);

drivers/rtc/rtc-stmp3xxx.c

192

STMP_OFFSET_REG_SET);

drivers/rtc/rtc-stmp3xxx.c

194

rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);

drivers/rtc/rtc-stmp3xxx.c

342

STMP_OFFSET_REG_SET);

drivers/rtc/rtc-stmp3xxx.c

84

rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);

drivers/rtc/rtc-stmp3xxx.c

86

rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

311

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

317

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

327

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

330

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

339

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

374

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

415

STMP_OFFSET_REG_SET);

drivers/spi/spi-mxs.c

91

ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);

lib/stmp_device.c

52

writel(STMP_MODULE_SFTRST, reset_addr + STMP_OFFSET_REG_SET);