SCD_BASE
#define SCD_SRAM_BASE_ADDR (SCD_BASE + 0x0)
#define SCD_DRAM_BASE_ADDR (SCD_BASE + 0x8)
#define SCD_AIT (SCD_BASE + 0x0c)
#define SCD_TXFACT (SCD_BASE + 0x10)
#define SCD_ACTIVE (SCD_BASE + 0x14)
#define SCD_QUEUECHAIN_SEL (SCD_BASE + 0xe8)
#define SCD_CHAINEXT_EN (SCD_BASE + 0x244)
#define SCD_AGGR_SEL (SCD_BASE + 0x248)
#define SCD_INTERRUPT_MASK (SCD_BASE + 0x108)
#define SCD_GP_CTRL (SCD_BASE + 0x1a8)
#define SCD_EN_CTRL (SCD_BASE + 0x254)
return SCD_BASE + 0x18 + chnl * 4;
return SCD_BASE + 0x284 + (chnl - 20) * 4;
return SCD_BASE + 0x68 + chnl * 4;
return SCD_BASE + 0x2B4 + chnl * 4;
return SCD_BASE + 0x10c + chnl * 4;
return SCD_BASE + 0x334 + chnl * 4;