Symbol: REG_SET_4
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c
225
value = REG_SET_4(DC_I2C_DATA, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
106
REG_SET_4(AFMT_GENERIC_HDR, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
494
REG_SET_4(DP_MSA_TIMING_PARAM3, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1516
REG_SET_4(REGAMMA_CNTLA_REGION_0_1, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1523
REG_SET_4(REGAMMA_CNTLA_REGION_2_3, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1530
REG_SET_4(REGAMMA_CNTLA_REGION_4_5, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1537
REG_SET_4(REGAMMA_CNTLA_REGION_6_7, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1544
REG_SET_4(REGAMMA_CNTLA_REGION_8_9, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1551
REG_SET_4(REGAMMA_CNTLA_REGION_10_11, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1558
REG_SET_4(REGAMMA_CNTLA_REGION_12_13, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
1565
REG_SET_4(REGAMMA_CNTLA_REGION_14_15, 0,
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
260
REG_SET_4(SCL_COEF_RAM_TAP_DATA, 0,
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c
135
REG_SET_4(reg_region_cur, 0,
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c
709
REG_SET_4(WBSCL_COEF_RAM_TAP_DATA, 0,
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
92
REG_SET_4(reg_region_cur, 0,
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c
88
REG_SET_4(VPG_GENERIC_PACKET_DATA, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
447
REG_SET_4(DP_MSA_TIMING_PARAM3, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
826
REG_SET_4(AFMT_GENERIC_HDR, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
96
REG_SET_4(AFMT_GENERIC_HDR, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
170
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
180
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
190
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
200
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
247
REG_SET_4(AFMT_GENERIC_HDR, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
221
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
231
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
241
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
251
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
261
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL6, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
271
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL6, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
281
REG_SET_4(HDMI_GENERIC_PACKET_CONTROL6, 0,
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
689
REG_SET_4(DP_MSA_TIMING_PARAM3, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
264
REG_SET_4(SCL_COEF_RAM_TAP_DATA, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
688
REG_SET_4(SCL_TAP_CONTROL, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
660
REG_SET_4(CM_SHAPER_RAMA_REGION_0_1, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
667
REG_SET_4(CM_SHAPER_RAMA_REGION_2_3, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
674
REG_SET_4(CM_SHAPER_RAMA_REGION_4_5, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
681
REG_SET_4(CM_SHAPER_RAMA_REGION_6_7, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
688
REG_SET_4(CM_SHAPER_RAMA_REGION_8_9, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
695
REG_SET_4(CM_SHAPER_RAMA_REGION_10_11, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
702
REG_SET_4(CM_SHAPER_RAMA_REGION_12_13, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
709
REG_SET_4(CM_SHAPER_RAMA_REGION_14_15, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
716
REG_SET_4(CM_SHAPER_RAMA_REGION_16_17, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
723
REG_SET_4(CM_SHAPER_RAMA_REGION_18_19, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
730
REG_SET_4(CM_SHAPER_RAMA_REGION_20_21, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
737
REG_SET_4(CM_SHAPER_RAMA_REGION_22_23, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
744
REG_SET_4(CM_SHAPER_RAMA_REGION_24_25, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
751
REG_SET_4(CM_SHAPER_RAMA_REGION_26_27, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
758
REG_SET_4(CM_SHAPER_RAMA_REGION_28_29, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
765
REG_SET_4(CM_SHAPER_RAMA_REGION_30_31, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
772
REG_SET_4(CM_SHAPER_RAMA_REGION_32_33, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
810
REG_SET_4(CM_SHAPER_RAMB_REGION_0_1, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
817
REG_SET_4(CM_SHAPER_RAMB_REGION_2_3, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
824
REG_SET_4(CM_SHAPER_RAMB_REGION_4_5, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
831
REG_SET_4(CM_SHAPER_RAMB_REGION_6_7, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
838
REG_SET_4(CM_SHAPER_RAMB_REGION_8_9, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
845
REG_SET_4(CM_SHAPER_RAMB_REGION_10_11, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
852
REG_SET_4(CM_SHAPER_RAMB_REGION_12_13, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
859
REG_SET_4(CM_SHAPER_RAMB_REGION_14_15, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
866
REG_SET_4(CM_SHAPER_RAMB_REGION_16_17, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
873
REG_SET_4(CM_SHAPER_RAMB_REGION_18_19, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
880
REG_SET_4(CM_SHAPER_RAMB_REGION_20_21, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
887
REG_SET_4(CM_SHAPER_RAMB_REGION_22_23, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
894
REG_SET_4(CM_SHAPER_RAMB_REGION_24_25, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
901
REG_SET_4(CM_SHAPER_RAMB_REGION_26_27, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
908
REG_SET_4(CM_SHAPER_RAMB_REGION_28_29, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
915
REG_SET_4(CM_SHAPER_RAMB_REGION_30_31, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
922
REG_SET_4(CM_SHAPER_RAMB_REGION_32_33, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1003
REG_SET_4(CM_SHAPER_RAMA_REGION_14_15, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1010
REG_SET_4(CM_SHAPER_RAMA_REGION_16_17, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1017
REG_SET_4(CM_SHAPER_RAMA_REGION_18_19, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1024
REG_SET_4(CM_SHAPER_RAMA_REGION_20_21, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1031
REG_SET_4(CM_SHAPER_RAMA_REGION_22_23, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1038
REG_SET_4(CM_SHAPER_RAMA_REGION_24_25, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1045
REG_SET_4(CM_SHAPER_RAMA_REGION_26_27, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1052
REG_SET_4(CM_SHAPER_RAMA_REGION_28_29, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1059
REG_SET_4(CM_SHAPER_RAMA_REGION_30_31, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1066
REG_SET_4(CM_SHAPER_RAMA_REGION_32_33, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1104
REG_SET_4(CM_SHAPER_RAMB_REGION_0_1, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1111
REG_SET_4(CM_SHAPER_RAMB_REGION_2_3, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1118
REG_SET_4(CM_SHAPER_RAMB_REGION_4_5, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1125
REG_SET_4(CM_SHAPER_RAMB_REGION_6_7, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1132
REG_SET_4(CM_SHAPER_RAMB_REGION_8_9, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1139
REG_SET_4(CM_SHAPER_RAMB_REGION_10_11, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1146
REG_SET_4(CM_SHAPER_RAMB_REGION_12_13, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1153
REG_SET_4(CM_SHAPER_RAMB_REGION_14_15, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1160
REG_SET_4(CM_SHAPER_RAMB_REGION_16_17, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1167
REG_SET_4(CM_SHAPER_RAMB_REGION_18_19, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1174
REG_SET_4(CM_SHAPER_RAMB_REGION_20_21, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1181
REG_SET_4(CM_SHAPER_RAMB_REGION_22_23, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1188
REG_SET_4(CM_SHAPER_RAMB_REGION_24_25, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1195
REG_SET_4(CM_SHAPER_RAMB_REGION_26_27, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1202
REG_SET_4(CM_SHAPER_RAMB_REGION_28_29, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1209
REG_SET_4(CM_SHAPER_RAMB_REGION_30_31, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1216
REG_SET_4(CM_SHAPER_RAMB_REGION_32_33, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
954
REG_SET_4(CM_SHAPER_RAMA_REGION_0_1, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
961
REG_SET_4(CM_SHAPER_RAMA_REGION_2_3, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
968
REG_SET_4(CM_SHAPER_RAMA_REGION_4_5, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
975
REG_SET_4(CM_SHAPER_RAMA_REGION_6_7, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
982
REG_SET_4(CM_SHAPER_RAMA_REGION_8_9, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
989
REG_SET_4(CM_SHAPER_RAMA_REGION_10_11, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
996
REG_SET_4(CM_SHAPER_RAMA_REGION_12_13, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
1184
REG_SET_4(SCL_TAP_CONTROL, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
262
REG_SET_4(SCL_COEF_RAM_TAP_DATA, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
707
REG_SET_4(DSCL_EASF_V_BF_FINAL_MAX_MIN, 0,
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
812
REG_SET_4(DSCL_EASF_H_BF_FINAL_MAX_MIN, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
614
REG_SET_4(DSCC_CONFIG0, 0, ICH_RESET_AT_END_OF_LINE,
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
627
REG_SET_4(DSCC_INTERRUPT_CONTROL_STATUS, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
696
REG_SET_4(DSCC_PPS_CONFIG12, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
702
REG_SET_4(DSCC_PPS_CONFIG13, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
708
REG_SET_4(DSCC_PPS_CONFIG14, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
233
REG_SET_4(DSCC_CONFIG0, 0, ICH_RESET_AT_END_OF_LINE,
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
246
REG_SET_4(DSCC_INTERRUPT_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
315
REG_SET_4(DSCC_PPS_CONFIG12, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
321
REG_SET_4(DSCC_PPS_CONFIG13, 0,
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
327
REG_SET_4(DSCC_PPS_CONFIG14, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
566
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
576
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
586
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
596
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
606
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
616
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
626
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
379
REG_SET_4(DP_SYM32_ENC_VID_MSA0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
385
REG_SET_4(DP_SYM32_ENC_VID_MSA1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
391
REG_SET_4(DP_SYM32_ENC_VID_MSA2, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
397
REG_SET_4(DP_SYM32_ENC_VID_MSA3, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
403
REG_SET_4(DP_SYM32_ENC_VID_MSA4, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
409
REG_SET_4(DP_SYM32_ENC_VID_MSA5, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
415
REG_SET_4(DP_SYM32_ENC_VID_MSA6, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
421
REG_SET_4(DP_SYM32_ENC_VID_MSA7, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
427
REG_SET_4(DP_SYM32_ENC_VID_MSA8, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
603
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
613
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
623
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
633
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL0, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
643
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
653
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
663
REG_SET_4(HDMI_TB_ENC_GENERIC_PACKET_CONTROL1, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c
583
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
204
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c
74
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
145
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
228
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c
256
REG_SET_4(DCN_EXPANSION_MODE, 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
515
REG_SET_4(SHAPER_RAMA_REGION_0_1[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
522
REG_SET_4(SHAPER_RAMA_REGION_2_3[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
529
REG_SET_4(SHAPER_RAMA_REGION_4_5[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
536
REG_SET_4(SHAPER_RAMA_REGION_6_7[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
543
REG_SET_4(SHAPER_RAMA_REGION_8_9[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
550
REG_SET_4(SHAPER_RAMA_REGION_10_11[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
557
REG_SET_4(SHAPER_RAMA_REGION_12_13[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
564
REG_SET_4(SHAPER_RAMA_REGION_14_15[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
572
REG_SET_4(SHAPER_RAMA_REGION_16_17[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
579
REG_SET_4(SHAPER_RAMA_REGION_18_19[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
586
REG_SET_4(SHAPER_RAMA_REGION_20_21[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
593
REG_SET_4(SHAPER_RAMA_REGION_22_23[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
600
REG_SET_4(SHAPER_RAMA_REGION_24_25[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
607
REG_SET_4(SHAPER_RAMA_REGION_26_27[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
614
REG_SET_4(SHAPER_RAMA_REGION_28_29[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
621
REG_SET_4(SHAPER_RAMA_REGION_30_31[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
628
REG_SET_4(SHAPER_RAMA_REGION_32_33[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
664
REG_SET_4(SHAPER_RAMB_REGION_0_1[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
671
REG_SET_4(SHAPER_RAMB_REGION_2_3[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
679
REG_SET_4(SHAPER_RAMB_REGION_4_5[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
686
REG_SET_4(SHAPER_RAMB_REGION_6_7[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
693
REG_SET_4(SHAPER_RAMB_REGION_8_9[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
700
REG_SET_4(SHAPER_RAMB_REGION_10_11[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
707
REG_SET_4(SHAPER_RAMB_REGION_12_13[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
714
REG_SET_4(SHAPER_RAMB_REGION_14_15[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
722
REG_SET_4(SHAPER_RAMB_REGION_16_17[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
729
REG_SET_4(SHAPER_RAMB_REGION_18_19[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
736
REG_SET_4(SHAPER_RAMB_REGION_20_21[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
743
REG_SET_4(SHAPER_RAMB_REGION_22_23[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
750
REG_SET_4(SHAPER_RAMB_REGION_24_25[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
757
REG_SET_4(SHAPER_RAMB_REGION_26_27[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
764
REG_SET_4(SHAPER_RAMB_REGION_28_29[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
771
REG_SET_4(SHAPER_RAMB_REGION_30_31[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
778
REG_SET_4(SHAPER_RAMB_REGION_32_33[rmu_idx], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
373
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_0_1[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
380
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_2_3[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
387
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_4_5[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
394
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_6_7[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
401
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_8_9[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
408
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_10_11[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
415
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_12_13[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
422
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_14_15[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
430
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_16_17[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
437
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_18_19[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
444
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_20_21[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
451
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_22_23[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
458
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_24_25[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
465
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_26_27[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
472
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_28_29[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
479
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_30_31[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
486
REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_32_33[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
525
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_0_1[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
532
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_2_3[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
540
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_4_5[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
547
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_6_7[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
554
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_8_9[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
561
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_10_11[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
568
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_12_13[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
575
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_14_15[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
583
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_16_17[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
590
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_18_19[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
597
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_20_21[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
604
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_22_23[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
611
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_24_25[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
618
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_26_27[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
625
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_28_29[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
632
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_30_31[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
639
REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_32_33[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
296
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_0_1[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
303
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_2_3[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
310
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_4_5[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
317
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_6_7[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
324
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_8_9[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
331
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_10_11[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
338
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_12_13[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
345
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_14_15[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
353
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_16_17[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
360
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_18_19[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
367
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_20_21[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
374
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_22_23[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
381
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_24_25[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
388
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_26_27[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
395
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_28_29[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
402
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_30_31[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
409
REG_SET_4(MPC_RMCM_SHAPER_RAMA_REGION_32_33[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
448
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_0_1[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
455
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_2_3[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
463
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_4_5[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
470
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_6_7[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
477
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_8_9[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
484
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_10_11[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
491
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_12_13[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
498
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_14_15[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
505
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_16_17[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
512
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_18_19[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
519
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_20_21[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
526
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_22_23[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
533
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_24_25[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
540
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_26_27[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
547
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_28_29[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
554
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_30_31[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
561
REG_SET_4(MPC_RMCM_SHAPER_RAMB_REGION_32_33[mpcc_id], 0,
drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
1212
REG_SET_4(OTG_TEST_PATTERN_CONTROL, 0,
drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
807
REG_SET_4(OTG_TRIGA_CNTL, 0,
drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
128
REG_SET_4(OPTC_DATA_SOURCE_SELECT, 0,