drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

149

REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

154

REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

172

REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

108

REG_SET_3(DC_I2C_DATA, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

103

REG_SET_3(CUR_COLOR1, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

108

REG_SET_3(CUR_COLOR2, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

188

REG_SET_3(DC_LUT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

227

REG_SET_3(DEGAMMA_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

217

REG_SET_3(DP_DPHY_SYM0, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

225

REG_SET_3(DP_DPHY_SYM1, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

248

REG_SET_3(SCL_COEF_RAM_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

111

REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

88

REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

93

REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

704

REG_SET_3(WBSCL_COEF_RAM_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

89

REG_SET_3(MMHUBBUB_WARMUP_CONTROL_STATUS, 0, MMHUBBUB_WARMUP_EN, true,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

146

REG_SET_3(DP_DPHY_SYM0, 0,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

154

REG_SET_3(DP_DPHY_SYM1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

314

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

320

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

777

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

251

REG_SET_3(SCL_COEF_RAM_TAP_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

636

REG_SET_3(DSCL_AUTOCAL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1001

REG_SET_3(ISHARP_LBA_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1005

REG_SET_3(ISHARP_LBA_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1009

REG_SET_3(ISHARP_LBA_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1013

REG_SET_3(ISHARP_LBA_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1128

REG_SET_3(DSCL_AUTOCAL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

249

REG_SET_3(SCL_COEF_RAM_TAP_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

670

REG_SET_3(DSCL_EASF_V_MODE, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

713

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

717

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

721

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

725

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

729

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

733

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG5, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

737

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG6, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

745

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

749

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

753

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

757

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

761

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

785

REG_SET_3(DSCL_EASF_H_MODE, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

818

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

822

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

826

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

830

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

834

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

838

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG5, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

842

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG6, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

850

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

854

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

858

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

862

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

866

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

991

REG_SET_3(ISHARP_NOISE_GAIN_PWL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

997

REG_SET_3(ISHARP_LBA_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

609

REG_SET_3(DSCC_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

633

REG_SET_3(DSCC_PPS_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

667

REG_SET_3(DSCC_PPS_CONFIG6, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

684

REG_SET_3(DSCC_PPS_CONFIG10, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

228

REG_SET_3(DSCC_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

252

REG_SET_3(DSCC_PPS_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

286

REG_SET_3(DSCC_PPS_CONFIG6, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

303

REG_SET_3(DSCC_PPS_CONFIG10, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

681

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

686

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

691

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

153

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

158

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

163

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

702

REG_SET_3(DMDATA_QOS_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

323

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

328

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

333

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

225

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

230

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

235

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

89

REG_SET_3(MMHUBBUB_WARMUP_CONTROL_STATUS, 0, MMHUBBUB_WARMUP_EN, true,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

224

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

235

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

246

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

585

REG_SET_3(OTG_BLACK_COLOR, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

762

REG_SET_3(OTG_TRIGA_CNTL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

771

REG_SET_3(OTG_TRIGA_CNTL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

167

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

209

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

432

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

147

REG_SET_3(OTG_BLANK_DATA_COLOR, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

152

REG_SET_3(OTG_BLANK_DATA_COLOR_EXT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

261

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

94

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

73

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

85

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

80

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

93

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

117

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

444

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

189

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,