REG_MAC_CTRL
AT_READ_REG(hw, REG_MAC_CTRL, p++);
AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl);
AT_READ_REG(hw, REG_MAC_CTRL, &data);
AT_WRITE_REG(hw, REG_MAC_CTRL, data);
AT_READ_REG(hw, REG_MAC_CTRL, &mac);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
regs_buff[13] = AT_READ_REG(hw, REG_MAC_CTRL);
AT_WRITE_REG(hw, REG_MAC_CTRL, value);
value = AT_READ_REG(hw, REG_MAC_CTRL);
AT_WRITE_REG(hw, REG_MAC_CTRL, value);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
ioread32(hw->hw_addr + REG_MAC_CTRL);
iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
ioread32(hw->hw_addr + REG_MAC_CTRL);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
value = ATL2_READ_REG(hw, REG_MAC_CTRL);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
value = ATL2_READ_REG(hw, REG_MAC_CTRL);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);
ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);
regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);
ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
writel(priv->reg_maccr, priv->base + REG_MAC_CTRL);
readl(priv->base + REG_MAC_CTRL));
writel(0, priv->base + REG_MAC_CTRL);
writel(priv->reg_maccr, priv->base + REG_MAC_CTRL);
writel(SW_RST, priv->base + REG_MAC_CTRL);
while (readl(priv->base + REG_MAC_CTRL) & SW_RST)