REG_CTRL0
mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0,
mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, C0_SIFM_MASK);
mxs_clr(AUART_CTRL0_SFTRST, s, REG_CTRL0);
reg = mxs_read(s, REG_CTRL0);
mxs_clr(AUART_CTRL0_CLKGATE, s, REG_CTRL0);
reg = mxs_read(s, REG_CTRL0);
mxs_clr(AUART_CTRL0_CLKGATE, s, REG_CTRL0);
mxs_set(AUART_CTRL0_SFTRST, s, REG_CTRL0);
reg = mxs_read(s, REG_CTRL0);
mxs_clr(AUART_CTRL0_CLKGATE, s, REG_CTRL0);
mxs_set(AUART_CTRL0_CLKGATE, s, REG_CTRL0);
old_ctrl0 = mxs_read(s, REG_CTRL0);
mxs_clr(AUART_CTRL0_CLKGATE, s, REG_CTRL0);
mxs_write(old_ctrl0, s, REG_CTRL0);
[REG_CTRL0] = ASM9260_HW_CTRL0,
[REG_CTRL0] = AUART_CTRL0,