RC
if (ssw & RC)
{"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
{"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
{"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
#define RS RC + 1
writel((tcd->rate + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
writel_relaxed(delta, tcaddr + ATMEL_TC_REG(2, RC));
writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC));
tcb_cache[i].rc = readl(tcaddr + ATMEL_TC_REG(i, RC));
writel(tcb_cache[i].rc, tcaddr + ATMEL_TC_REG(i, RC));
ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), &cnt);
return regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), val);
hisi_dma_set_mode(hdma_dev, RC);
writel_relaxed(mode == RC ? 1 : 0,
uint32_t RC:1;
cea_channels.channels.RC_RLC_FLC = speaker_flags.RC;
cea_channels.channels.RL_RC = speaker_flags.RC;
cea_channels.channels.RC_RLC_FLC = speaker_flags.RC;
cea_channels.channels.RL_RC = speaker_flags.RC;
cea_channels.channels.RC_RLC_FLC = speaker_flags.RC;
cea_channels.channels.RL_RC = speaker_flags.RC;
timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC));
timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC));
ib_qp_type(RC) \
case OP(RC, SEND_LAST_WITH_IMMEDIATE):
case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
case OP(RC, RDMA_READ_REQUEST):
case OP(RC, RDMA_WRITE_FIRST):
case OP(RC, RDMA_WRITE_ONLY):
case OP(RC, RDMA_READ_RESPONSE_FIRST):
case OP(RC, RDMA_READ_RESPONSE_LAST):
case OP(RC, RDMA_READ_RESPONSE_ONLY):
case OP(RC, ACKNOWLEDGE):
case OP(RC, ATOMIC_ACKNOWLEDGE):
case OP(RC, COMPARE_SWAP):
case OP(RC, FETCH_ADD):
case OP(RC, SEND_LAST_WITH_INVALIDATE):
case OP(RC, SEND_ONLY_WITH_INVALIDATE):
case RC:
case IB_QPT_RC: qp->transport = RC; break;
case RC:
case RC:
case RC: return MTHCA_QP_ST_RC;
if (qp->transport == RC || qp->transport == UC) {
val = KS_PCIE_DEV_TYPE(RC) | KS_PCIE_SYSCLOCKOUTEN;
val = RC;
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(channel, RC), &chan->rc);
regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(channel, RC), chan->rc);
#define BT_GETPAGE(IP, BN, MP, TYPE, SIZE, P, RC, ROOT)\
RC = 0;\
RC = 0;\
RC = -EIO;\
#define DT_GETPAGE(IP, BN, MP, SIZE, P, RC) \
BT_GETPAGE(IP, BN, MP, dtpage_t, SIZE, P, RC, i_dtroot); \
if (!(RC)) { \
RC = -EIO; \
int RC = LSM_RET_DEFAULT(HOOK); \
LSM_LOOP_UNROLL(__CALL_STATIC_INT, RC, HOOK, OUT, __VA_ARGS__); \
RC; \
#define smk_bu_note(note, sskp, oskp, mode, RC) (RC)
#define smk_bu_current(note, oskp, mode, RC) (RC)
#define smk_bu_task(otp, mode, RC) (RC)
#define smk_bu_inode(inode, mode, RC) (RC)
#define smk_bu_file(file, mode, RC) (RC)
#define smk_bu_credfile(cred, file, mode, RC) (RC)
{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
{ SNDRV_CHMAP_RC, RC },
[4] = RC,
.mask = FL | FR | LFE | FC | RC },
.mask = FL | FR | FC | RC },
.mask = FL | FR | LFE | RC },
.mask = FL | FR | RC },
.mask = FL | FR | LFE | FC | RL | RR | RC },
.mask = FL | FR | LFE | RC | FC | FLC | FRC },
.mask = FL | FR | FC | RL | RR | RC },
.mask = FL | FR | RC | FC | FLC | FRC },
.mask = FL | FR | LFE | RL | RR | RC },
.mask = FL | FR | LFE | RC | FLC | FRC },
.mask = FL | FR | RC | RL | RR },
.mask = FL | FR | RC | FLC | FRC },
.mask = FL | FR | LFE | FC | RC },
.mask = FL | FR | FC | RC },
.mask = FL | FR | LFE | RC },
.mask = FL | FR | RC },
[4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
[4] = RC,
{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
#define __PASTE(RA, RB, L, RC) \
(0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
#define PASTE(RA, RB, L, RC) \
.long __PASTE((RA), (RB), (L), (RC))