Q_CSR
skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET);
skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);
skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP);
skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);
skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP);
skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET);
skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START);
skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_STOP);
skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F);
skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F);
skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START);
sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
Q_ADDR(rxqaddr[sky2->port], Q_CSR),
sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Q_ADDR(rxqaddr[sky2->port], Q_CSR),