Symbol: PORT_D
drivers/gpu/drm/i915/display/g4x_dp.c
1387
if (port == PORT_D)
drivers/gpu/drm/i915/display/g4x_hdmi.c
659
return port == PORT_B || port == PORT_C || port == PORT_D;
drivers/gpu/drm/i915/display/g4x_hdmi.c
744
if (port == PORT_D)
drivers/gpu/drm/i915/display/intel_bios.c
2372
[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
drivers/gpu/drm/i915/display/intel_combo_phy.c
166
bool ddi_d_present = intel_bios_is_port_present(display, PORT_D);
drivers/gpu/drm/i915/display/intel_ddi.c
3392
[PORT_D] = TRANSCODER_C,
drivers/gpu/drm/i915/display/intel_ddi.c
5032
if (port == PORT_D)
drivers/gpu/drm/i915/display/intel_ddi.c
5109
case PORT_D:
drivers/gpu/drm/i915/display/intel_ddi.c
5150
port_name(port - PORT_D_XELPD + PORT_D),
drivers/gpu/drm/i915/display/intel_display.c
1884
port == PORT_D)
drivers/gpu/drm/i915/display/intel_display.c
7875
dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7893
g4x_hdmi_init(display, PCH_HDMID, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7899
g4x_dp_init(display, PCH_DP_D, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7940
has_port = intel_bios_is_port_present(display, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7942
g4x_dp_init(display, CHV_DP_D, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7944
g4x_hdmi_init(display, CHV_HDMID, PORT_D);
drivers/gpu/drm/i915/display/intel_display.c
7991
g4x_dp_init(display, DP_D, PORT_D);
drivers/gpu/drm/i915/display/intel_display.h
108
case PORT_D:
drivers/gpu/drm/i915/display/intel_display_device.c
1793
display_runtime->port_mask &= ~BIT(PORT_D);
drivers/gpu/drm/i915/display/intel_display_device.c
426
.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */
drivers/gpu/drm/i915/display/intel_display_device.c
438
.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */
drivers/gpu/drm/i915/display/intel_display_device.c
453
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
drivers/gpu/drm/i915/display/intel_display_device.c
482
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
drivers/gpu/drm/i915/display/intel_display_device.c
507
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
drivers/gpu/drm/i915/display/intel_display_device.c
585
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
drivers/gpu/drm/i915/display/intel_display_device.c
638
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
drivers/gpu/drm/i915/display/intel_display_device.c
657
.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */
drivers/gpu/drm/i915/display/intel_display_device.c
682
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
drivers/gpu/drm/i915/display/intel_display_device.c
931
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
drivers/gpu/drm/i915/display/intel_display_device.c
939
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),
drivers/gpu/drm/i915/display/intel_display_limits.h
106
PORT_TC1 = PORT_D,
drivers/gpu/drm/i915/display/intel_dpio_phy.c
1191
case PORT_D:
drivers/gpu/drm/i915/display/intel_dpio_phy.c
666
case PORT_D:
drivers/gpu/drm/i915/display/intel_dpio_phy.c
682
case PORT_D:
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
3387
if (port == PORT_D || port == PORT_E) {
drivers/gpu/drm/i915/display/intel_hdcp.c
477
case PORT_D:
drivers/gpu/drm/i915/display/intel_hdmi.c
2810
case PORT_D:
drivers/gpu/drm/i915/display/intel_hdmi.c
2853
case PORT_D:
drivers/gpu/drm/i915/display/intel_hdmi.c
2975
case PORT_D:
drivers/gpu/drm/i915/display/intel_pch_display.c
101
assert_pch_hdmi_disabled(display, pipe, PORT_D, PCH_HDMID);
drivers/gpu/drm/i915/display/intel_pch_display.c
170
ibx_sanitize_pch_dp_port(display, PORT_D, PCH_DP_D);
drivers/gpu/drm/i915/display/intel_pch_display.c
175
ibx_sanitize_pch_hdmi_port(display, PORT_D, PCH_HDMID);
drivers/gpu/drm/i915/display/intel_pch_display.c
437
drm_WARN_ON(display->drm, port < PORT_B || port > PORT_D);
drivers/gpu/drm/i915/display/intel_pch_display.c
86
assert_pch_dp_disabled(display, pipe, PORT_D, PCH_DP_D);
drivers/gpu/drm/i915/display/intel_pipe_crc.c
113
case PORT_D:
drivers/gpu/drm/i915/display/intel_pps.c
1633
case PORT_D:
drivers/gpu/drm/i915/display/intel_pps.c
1843
g4x_dp_port_enabled(display, PCH_DP_D, PORT_D, &panel_pipe);
drivers/gpu/drm/i915/gvt/display.c
469
if (intel_vgpu_has_monitor_on_port(vgpu, PORT_D)) {
drivers/gpu/drm/i915/gvt/display.c
471
~DPLL_CTRL2_DDI_CLK_OFF(PORT_D);
drivers/gpu/drm/i915/gvt/display.c
473
DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_D);
drivers/gpu/drm/i915/gvt/display.c
475
DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_D);
drivers/gpu/drm/i915/gvt/display.c
482
(PORT_D << TRANS_DDI_PORT_SHIFT) |
drivers/gpu/drm/i915/gvt/display.c
485
vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &=
drivers/gpu/drm/i915/gvt/display.c
487
vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |=
drivers/gpu/drm/i915/gvt/display.c
490
vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE;
drivers/gpu/drm/i915/gvt/display.c
491
vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE;
drivers/gpu/drm/i915/gvt/display.c
784
clean_virtual_dp_monitor(vgpu, PORT_D);
drivers/gpu/drm/i915/gvt/display.c
812
return setup_virtual_dp_monitor(vgpu, PORT_D, GVT_DP_D,
drivers/gpu/drm/i915/gvt/edid.c
114
port = PORT_D;
drivers/gpu/drm/i915/gvt/edid.c
130
port = PORT_D;
drivers/gpu/drm/i915/gvt/edid.c
98
port = PORT_D;
drivers/gpu/drm/i915/gvt/handlers.c
2378
MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write);
drivers/gpu/drm/i915/gvt/handlers.c
2384
MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write);
drivers/gpu/drm/i915/gvt/handlers.c
2390
MMIO_DH(DP_TP_STATUS(PORT_D), D_ALL, NULL, dp_tp_status_mmio_write);
drivers/gpu/drm/i915/gvt/handlers.c
676
if (port != PORT_B && port != PORT_D) {
drivers/gpu/drm/i915/gvt/vgpu.c
380
ret = intel_gvt_set_edid(vgpu, PORT_D);
drivers/gpu/drm/i915/intel_gvt_mmio_table.c
509
MMIO_D(PORT_CLK_SEL(PORT_D));
drivers/gpu/drm/i915/intel_gvt_mmio_table.c
540
MMIO_D(DDI_BUF_CTL(PORT_D));
drivers/gpu/drm/i915/intel_gvt_mmio_table.c
545
MMIO_D(DP_TP_CTL(PORT_D));
drivers/gpu/drm/i915/intel_gvt_mmio_table.c
550
MMIO_D(DP_TP_STATUS(PORT_D));