drivers/gpu/drm/i915/display/g4x_dp.c

1232

if (HAS_PCH_SPLIT(display) && encoder->port != PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

132

if (display->platform.ivybridge && port == PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

1353

if ((display->platform.ivybridge && port == PORT_A) ||

drivers/gpu/drm/i915/display/g4x_dp.c

1354

(HAS_PCH_CPT(display) && port != PORT_A)) {

drivers/gpu/drm/i915/display/g4x_dp.c

1366

else if (display->platform.ivybridge && port == PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

1368

else if (display->platform.sandybridge && port == PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

1374

(HAS_PCH_SPLIT(display) && port != PORT_A)) {

drivers/gpu/drm/i915/display/g4x_dp.c

1403

if (port == PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

1409

if (port != PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

143

} else if (HAS_PCH_CPT(display) && port != PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

287

if (display->platform.ivybridge && port == PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

289

else if (HAS_PCH_CPT(display) && port != PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

351

pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;

drivers/gpu/drm/i915/display/g4x_dp.c

353

if (HAS_PCH_CPT(display) && port != PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

393

if (port == PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

435

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B && port != PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.c

551

if (port == PORT_A)

drivers/gpu/drm/i915/display/g4x_dp.c

746

if (port == PORT_A)

drivers/gpu/drm/i915/display/icl_dsi.c

107

if (port == PORT_A)

drivers/gpu/drm/i915/display/icl_dsi.c

1424

port == PORT_A ?

drivers/gpu/drm/i915/display/icl_dsi.c

1562

if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))

drivers/gpu/drm/i915/display/icl_dsi.c

2008

intel_dsi->ports = BIT(PORT_A) | BIT(PORT_B);

drivers/gpu/drm/i915/display/icl_dsi.c

239

port = PORT_A;

drivers/gpu/drm/i915/display/icl_dsi.c

409

port == PORT_A ?

drivers/gpu/drm/i915/display/intel_audio.c

633

if (drm_WARN_ON(display->drm, port == PORT_A))

drivers/gpu/drm/i915/display/intel_audio.c

669

if (drm_WARN_ON(display->drm, port == PORT_A))

drivers/gpu/drm/i915/display/intel_bios.c

1687

panel->vbt.dsi.bl_ports = BIT(PORT_A);

drivers/gpu/drm/i915/display/intel_bios.c

1694

panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);

drivers/gpu/drm/i915/display/intel_bios.c

1703

panel->vbt.dsi.cabc_ports = BIT(PORT_A);

drivers/gpu/drm/i915/display/intel_bios.c

1711

BIT(PORT_A) | BIT(port_bc);

drivers/gpu/drm/i915/display/intel_bios.c

2348

for (port = PORT_A; port < n_ports; port++) {

drivers/gpu/drm/i915/display/intel_bios.c

2369

[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },

drivers/gpu/drm/i915/display/intel_bios.c

2384

[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },

drivers/gpu/drm/i915/display/intel_bios.c

2395

[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },

drivers/gpu/drm/i915/display/intel_bios.c

2404

[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },

drivers/gpu/drm/i915/display/intel_bios.c

2442

return PORT_A;

drivers/gpu/drm/i915/display/intel_bios.c

2609

if (port != PORT_A || DISPLAY_VER(display) >= 12)

drivers/gpu/drm/i915/display/intel_bios.c

3051

if (port != PORT_A && port != PORT_E)

drivers/gpu/drm/i915/display/intel_bios.c

3057

if (port == PORT_A)

drivers/gpu/drm/i915/display/intel_combo_phy.c

165

bool ddi_a_present = intel_bios_is_port_present(display, PORT_A);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3472

if ((display->platform.battlemage && encoder->port == PORT_A) ||

drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h

33

(port >= PORT_TC1 ? port : PORT_TC4 + 1 + port - PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

1124

if (encoder->port == PORT_A && dig_port->max_lanes == 4)

drivers/gpu/drm/i915/display/intel_ddi.c

1934

case PORT_A:

drivers/gpu/drm/i915/display/intel_ddi.c

2898

is_mst && (port == PORT_A || port == PORT_E));

drivers/gpu/drm/i915/display/intel_ddi.c

2900

drm_WARN_ON(display->drm, is_mst && port == PORT_A);

drivers/gpu/drm/i915/display/intel_ddi.c

2940

if ((port != PORT_A || DISPLAY_VER(display) >= 9) &&

drivers/gpu/drm/i915/display/intel_ddi.c

3371

if (port == PORT_A && DISPLAY_VER(display) < 9)

drivers/gpu/drm/i915/display/intel_ddi.c

3389

[PORT_A] = TRANSCODER_EDP,

drivers/gpu/drm/i915/display/intel_ddi.c

3398

if (drm_WARN_ON(display->drm, port < PORT_A || port > PORT_E))

drivers/gpu/drm/i915/display/intel_ddi.c

3399

port = PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

3870

if (port == PORT_A && DISPLAY_VER(display) < 12)

drivers/gpu/drm/i915/display/intel_ddi.c

4497

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

4937

if (dig_port->base.port != PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

4962

if (port == PORT_A || port == PORT_E) {

drivers/gpu/drm/i915/display/intel_ddi.c

4963

if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)

drivers/gpu/drm/i915/display/intel_ddi.c

4964

max_lanes = port == PORT_A ? 4 : 0;

drivers/gpu/drm/i915/display/intel_ddi.c

4992

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5000

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5008

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5019

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5027

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5038

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5046

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_ddi.c

5103

case PORT_A:

drivers/gpu/drm/i915/display/intel_ddi.c

5104

return intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;

drivers/gpu/drm/i915/display/intel_ddi.c

5480

if (port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

5485

if (port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

768

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A)

drivers/gpu/drm/i915/display/intel_ddi.c

825

if (HAS_TRANSCODER(display, TRANSCODER_EDP) && port == PORT_A) {

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

1242

if (port == PORT_A || port == PORT_E)

drivers/gpu/drm/i915/display/intel_display.c

1887

return PHY_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_display.c

3921

for_each_port_masked(port, BIT(PORT_A) | BIT(PORT_C)) {

drivers/gpu/drm/i915/display/intel_display.c

3922

if (port == PORT_A)

drivers/gpu/drm/i915/display/intel_display.c

7830

if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)

drivers/gpu/drm/i915/display/intel_display.c

7878

g4x_dp_init(display, DP_A, PORT_A);

drivers/gpu/drm/i915/display/intel_display.h

102

case PORT_A:

drivers/gpu/drm/i915/display/intel_display.h

187

for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++)

drivers/gpu/drm/i915/display/intel_display_debugfs.c

886

lpsp_capable = (encoder->port == PORT_A &&

drivers/gpu/drm/i915/display/intel_display_device.c

1036

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

1053

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

1076

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

1115

.__runtime_defaults.port_mask = BIT(PORT_A) |

drivers/gpu/drm/i915/display/intel_display_device.c

1173

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

1238

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D_XELPD) |

drivers/gpu/drm/i915/display/intel_display_device.c

1341

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | \

drivers/gpu/drm/i915/display/intel_display_device.c

1367

BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_TC1) | BIT(PORT_TC2),

drivers/gpu/drm/i915/display/intel_display_device.c

1372

.__runtime_defaults.port_mask = BIT(PORT_A) |

drivers/gpu/drm/i915/display/intel_display_device.c

263

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */

drivers/gpu/drm/i915/display/intel_display_device.c

453

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

drivers/gpu/drm/i915/display/intel_display_device.c

482

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

drivers/gpu/drm/i915/display/intel_display_device.c

507

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

drivers/gpu/drm/i915/display/intel_display_device.c

585

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

drivers/gpu/drm/i915/display/intel_display_device.c

638

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

drivers/gpu/drm/i915/display/intel_display_device.c

682

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

drivers/gpu/drm/i915/display/intel_display_device.c

833

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)

drivers/gpu/drm/i915/display/intel_display_device.c

931

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

drivers/gpu/drm/i915/display/intel_display_device.c

939

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),

drivers/gpu/drm/i915/display/intel_display_irq.c

1337

PORT_A : PORT_B;

drivers/gpu/drm/i915/display/intel_display_irq.c

1338

dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1;

drivers/gpu/drm/i915/display/intel_display_irq.c

1369

port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A;

drivers/gpu/drm/i915/display/intel_display_irq.c

1775

port = PORT_A;

drivers/gpu/drm/i915/display/intel_display_power.c

2373

.port_start = PORT_A,

drivers/gpu/drm/i915/display/intel_display_power.c

2389

.port_start = PORT_A,

drivers/gpu/drm/i915/display/intel_display_power.c

2416

.port_start = PORT_A,

drivers/gpu/drm/i915/display/intel_display_power.c

2443

.port_start = PORT_A,

drivers/gpu/drm/i915/display/intel_dp.c

1781

if (DISPLAY_VER(display) == 11 && encoder->port != PORT_A &&

drivers/gpu/drm/i915/display/intel_dp.c

3110

if (DISPLAY_VER(display) < 12 && port == PORT_A)

drivers/gpu/drm/i915/display/intel_dp.c

520

encoder->port != PORT_A);

drivers/gpu/drm/i915/display/intel_dp.c

7120

if (DISPLAY_VER(display) < 9 && port == PORT_A)

drivers/gpu/drm/i915/display/intel_dp.c

7146

if (port == PORT_A)

drivers/gpu/drm/i915/display/intel_dp.c

7166

if (!display->platform.g4x && port != PORT_A)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1928

if (DISPLAY_VER(display) < 12 && port == PORT_A)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

186

[DPIO_CH0] = { .port = PORT_A },

drivers/gpu/drm/i915/display/intel_dpio_phy.c

209

[DPIO_CH0] = { .port = PORT_A },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

213

case PORT_A:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3403

port != PORT_A) {

drivers/gpu/drm/i915/display/intel_dsi_vbt.c

98

return PORT_A;

drivers/gpu/drm/i915/display/intel_dvo.c

85

.port = PORT_A,

drivers/gpu/drm/i915/display/intel_hdcp.c

2292

case PORT_A:

drivers/gpu/drm/i915/display/intel_hdcp.c

471

case PORT_A:

drivers/gpu/drm/i915/display/intel_hdmi.c

2928

drm_WARN_ON(display->drm, encoder->port == PORT_A);

drivers/gpu/drm/i915/display/intel_hdmi.c

3134

if (DISPLAY_VER(display) < 12 && drm_WARN_ON(dev, port == PORT_A))

drivers/gpu/drm/i915/display/intel_hotplug.c

99

return HPD_PORT_A + port - PORT_A;

drivers/gpu/drm/i915/display/intel_pch_refclk.c

520

if (encoder->port == PORT_A)

drivers/gpu/drm/i915/display/intel_pps.c

1627

case PORT_A:

drivers/gpu/drm/i915/display/intel_pps.c

1837

g4x_dp_port_enabled(display, DP_A, PORT_A, &panel_pipe);

drivers/gpu/drm/i915/display/intel_psr.c

1276

return pipe == PIPE_A && port == PORT_A;

drivers/gpu/drm/i915/display/intel_psr.c

3813

if (DISPLAY_VER(display) < 12 && dig_port->base.port != PORT_A) {

drivers/gpu/drm/i915/display/vlv_dsi.c

1330

tmp = intel_de_read(display, MIPI_CTRL(display, PORT_A));

drivers/gpu/drm/i915/display/vlv_dsi.c

1332

intel_de_write(display, MIPI_CTRL(display, PORT_A),

drivers/gpu/drm/i915/display/vlv_dsi.c

1431

MIPI_INIT_COUNT(display, port == PORT_A ? PORT_C : PORT_A),

drivers/gpu/drm/i915/display/vlv_dsi.c

1961

else if (port == PORT_A)

drivers/gpu/drm/i915/display/vlv_dsi.c

1971

intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);

drivers/gpu/drm/i915/display/vlv_dsi.c

342

intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);

drivers/gpu/drm/i915/display/vlv_dsi.c

382

intel_de_rmw(display, MIPI_CTRL(display, PORT_A), 0, GLK_MIPIIO_RESET_RELEASED);

drivers/gpu/drm/i915/display/vlv_dsi.c

483

intel_de_rmw(display, VLV_MIPI_PORT_CTRL(PORT_A), 0, LP_OUTPUT_HOLD);

drivers/gpu/drm/i915/display/vlv_dsi.c

542

intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0);

drivers/gpu/drm/i915/display/vlv_dsi.c

578

BXT_MIPI_PORT_CTRL(port) : VLV_MIPI_PORT_CTRL(PORT_A);

drivers/gpu/drm/i915/display/vlv_dsi.c

596

if ((display->platform.broxton || port == PORT_A) &&

drivers/gpu/drm/i915/display/vlv_dsi.c

642

if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {

drivers/gpu/drm/i915/display/vlv_dsi.c

996

*pipe = port == PORT_A ? PIPE_A : PIPE_B;

drivers/gpu/drm/i915/display/vlv_dsi_pll.c

191

if (intel_dsi->ports & (1 << PORT_A))

drivers/gpu/drm/i915/display/vlv_dsi_regs.h

16

#define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */

drivers/gpu/drm/i915/gvt/display.c

220

for (port = PORT_A; port <= PORT_C; port++) {

drivers/gpu/drm/i915/gvt/display.c

280

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {

drivers/gpu/drm/i915/gvt/display.c

286

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |=

drivers/gpu/drm/i915/gvt/display.c

288

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &=

drivers/gpu/drm/i915/gvt/display.c

291

vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_A)) |=

drivers/gpu/drm/i915/gvt/display.c

295

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |=

drivers/gpu/drm/i915/gvt/display.c

297

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &=

drivers/gpu/drm/i915/gvt/display.c

503

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {

drivers/gpu/drm/i915/gvt/display.c

510

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED;

drivers/gpu/drm/i915/gvt/display.c

710

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {

drivers/gpu/drm/i915/gvt/handlers.c

1184

(((port) >= PORT_A) && ((port) < I915_MAX_PORTS))

drivers/gpu/drm/i915/gvt/handlers.c

2375

MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2381

MMIO_DH(DP_TP_CTL(PORT_A), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2387

MMIO_DH(DP_TP_STATUS(PORT_A), D_ALL, NULL, dp_tp_status_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2790

MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_A), D_BXT,

drivers/gpu/drm/i915/gvt/handlers.c

570

case PORT_A:

drivers/gpu/drm/i915/gvt/handlers.c

963

calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))

drivers/gpu/drm/i915/gvt/mmio.c

279

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &=

drivers/gpu/drm/i915/gvt/mmio.c

281

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |=

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

1150

MMIO_D(BXT_PHY_CTL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

1153

MMIO_D(BXT_PORT_PLL_ENABLE(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

506

MMIO_D(PORT_CLK_SEL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

537

MMIO_D(DDI_BUF_CTL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

542

MMIO_D(DP_TP_CTL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

547

MMIO_D(DP_TP_STATUS(PORT_A));

drivers/staging/media/ipu7/ipu7-isys-csi-phy.c

1039

csi2->nlanes > 2U && csi2->port == PORT_A)

drivers/staging/media/ipu7/ipu7-isys-csi-phy.c

575

val = (id == PORT_A) ? 3 : 0;

drivers/staging/media/ipu7/ipu7-isys-csi-phy.c

907

if (aggregation && id != PORT_A)

drivers/staging/media/ipu7/ipu7-isys-csi-phy.c

969

if (!is_ipu7(isys->adev->isp->hw_ver) && lanes > 2 && id == PORT_A) {

drivers/staging/media/tegra-video/tegra20.c

1024

if (port == PORT_A)

drivers/staging/media/tegra-video/tegra20.c

1091

value = (port == PORT_A) ? CSI_A_PHY_CIL_ENABLE | CSI_B_PHY_CIL_DISABLE :

drivers/staging/media/tegra-video/tegra20.c

1129

value = (port == PORT_A) ? CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_NOP :

drivers/staging/media/tegra-video/tegra20.c

901

if (port == PORT_A)

drivers/staging/media/tegra-video/tegra210.c

1015

val = ((portno & 1) == PORT_A) ?

drivers/staging/media/tegra-video/tegra210.c

1108

val = ((portno & 1) == PORT_A) ?

samples/bpf/test_map_in_map_user.c

53

ret = bpf_map_update_elem(PORT_A, &port_key, &magic_result, BPF_ANY);

samples/bpf/test_map_in_map_user.c

60

ret = bpf_map_update_elem(A_OF_PORT_A, &port_key, &PORT_A, BPF_ANY);

samples/bpf/test_map_in_map_user.c

62

check_map_id(PORT_A, A_OF_PORT_A, port_key);

samples/bpf/test_map_in_map_user.c

64

ret = bpf_map_update_elem(H_OF_PORT_A, &port_key, &PORT_A, BPF_NOEXIST);

samples/bpf/test_map_in_map_user.c

66

check_map_id(PORT_A, H_OF_PORT_A, port_key);