drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1001
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(27), ((X*Oldval_1>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1010
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1016
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1020
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(25), ((Y*Oldval_1>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
103
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1035
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1037
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
104
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
105
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(24), 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1071
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC94][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1072
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC80][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1073
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC4C][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1075
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xC14][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1076
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xCA0][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
109
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
110
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
111
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(28), 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1131
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1161
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, 0x01c00014);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1163
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, pathOn);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1167
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, pathOn);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1350
PHY_SetBBReg(pDM_Odm->Adapter, rCCK0_AFESetting, 0x0f000000, 0xf);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1351
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1352
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1353
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1362
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1376
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1407
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1432
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1449
PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, 0x50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1450
PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, tmp0xc50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1452
PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, 0x50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1453
PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, tmp0xc58);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1457
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1458
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1589
PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1600
PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1718
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, GNT_BT_default);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
355
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
368
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
369
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
371
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
372
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
373
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
374
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
376
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
377
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
378
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
379
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
382
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
385
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
390
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
393
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
396
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
399
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
400
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
407
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
409
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
412
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
453
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
462
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
465
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
466
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
469
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
470
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
471
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
472
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
475
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
476
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
477
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
478
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
481
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
484
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
489
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
492
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
495
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
498
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
499
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
506
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
508
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
511
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
536
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
539
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
552
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
555
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
556
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
557
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
558
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
560
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
562
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
563
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
564
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
567
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
570
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
575
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
578
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
581
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
584
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
585
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
592
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
594
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
597
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
605
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
638
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
651
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
652
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
654
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
655
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
656
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
657
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
660
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
661
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
662
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
663
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
666
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
669
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
672
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
676
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
679
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
680
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
687
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
689
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
692
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
728
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
731
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
742
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
743
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
746
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
747
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
748
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
749
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
75
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
752
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
753
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
754
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
755
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
758
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
761
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
764
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
768
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
771
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
772
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
779
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
78
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
781
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
784
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
809
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
81
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(24), value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
813
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
829
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
832
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
833
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
834
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
835
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
837
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
839
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
840
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
841
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
844
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
847
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
850
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
854
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
857
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
858
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
865
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
867
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
870
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
88
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
91
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
924
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
926
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(31), ((X*Oldval_0>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
934
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
938
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
94
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(28), value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
942
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(29), ((Y*Oldval_0>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
959
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
961
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
966
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
999
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
drivers/staging/rtl8723bs/hal/hal_btcoex.c
666
PHY_SetBBReg(padapter, RegAddr, BitMask, Data);
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
22
PHY_SetBBReg(
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
48
PHY_SetBBReg(
drivers/staging/rtl8723bs/hal/odm_DIG.c
135
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
136
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
158
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
159
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
21
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_8 */
drivers/staging/rtl8723bs/hal/odm_DIG.c
210
PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT(11), 1); /* stop counting if EDCCA is asserted */
drivers/staging/rtl8723bs/hal/odm_DIG.c
22
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(10)|BIT(9)|BIT(8), 0x7); /* 0x890[9:8]=3 enable CCX */
drivers/staging/rtl8723bs/hal/odm_DIG.c
23
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT(7), 0x1); /* 0xc0c[7]= 1 max power among all RX ants */
drivers/staging/rtl8723bs/hal/odm_DIG.c
233
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
drivers/staging/rtl8723bs/hal/odm_DIG.c
238
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, 0x7f);
drivers/staging/rtl8723bs/hal/odm_DIG.c
239
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, 0x7f);
drivers/staging/rtl8723bs/hal/odm_DIG.c
274
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
275
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
295
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_A), ODM_BIT(IGI), CurrentIGI);
drivers/staging/rtl8723bs/hal/odm_DIG.c
297
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_B), ODM_BIT(IGI), CurrentIGI);
drivers/staging/rtl8723bs/hal/odm_DIG.c
51
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
drivers/staging/rtl8723bs/hal/odm_DIG.c
52
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
607
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
609
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
644
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
645
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
65
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
66
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT(3), 0); /* RegC70[3]= 1'b0 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
67
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
68
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
69
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
70
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x0); /* Reg818[28]= 1'b0 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
71
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x1); /* Reg818[28]= 1'b1 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
73
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
74
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT(3), pDM_PSTable->RegC70);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
75
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
76
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
77
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x0);
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
112
PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
151
PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
109
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
113
PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
117
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
118
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
204
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
399
PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
443
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
446
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
449
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
452
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
456
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
459
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
462
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
465
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
469
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
472
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
475
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
478
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
482
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
485
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
488
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
491
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
495
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
498
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
501
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
504
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
619
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
621
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
623
PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT(31) | BIT(30)), 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
628
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
630
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
633
PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
635
PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
637
PHY_SetBBReg(Adapter, 0x818, (BIT(26) | BIT(27)), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
107
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
111
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
115
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
118
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
133
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
136
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
drivers/staging/rtl8723bs/include/hal_intf.h
223
#define PHY_SetMacReg PHY_SetBBReg