Symbol: PHY_SetBBReg
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1023
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1025
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(27), ((X*Oldval_1>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1034
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
104
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1040
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1044
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(25), ((Y*Oldval_1>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
105
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1059
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
106
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1061
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1095
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC94][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1096
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC80][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1097
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[path][IDX_0xC4C][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1099
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xC14][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
110
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1100
PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[path][IDX_0xCA0][VAL]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
111
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
112
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, 0x00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1157
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1188
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, 0x01c00014);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1190
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, pathOn);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1194
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, pathOn);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1379
PHY_SetBBReg(pDM_Odm->Adapter, rCCK0_AFESetting, 0x0f000000, 0xf);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1380
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1381
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1382
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1393
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1407
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1439
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1464
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1481
PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, 0x50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1482
PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, tmp0xc50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1484
PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, 0x50);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1485
PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, tmp0xc58);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1489
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1490
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1623
PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1634
PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
1754
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, GNT_BT_default);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
369
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
382
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
383
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
385
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
386
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
387
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
388
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
390
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
391
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
392
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
393
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
396
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
399
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
404
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
407
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
410
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
413
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
414
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
421
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
423
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
426
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
469
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
478
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
481
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
482
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
485
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
486
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
487
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
488
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
491
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
492
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
493
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
494
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
497
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
500
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
505
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
508
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
511
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
514
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
515
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
522
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
524
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
527
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
552
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
555
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
569
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
572
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
573
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
574
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
575
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
577
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
579
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
580
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
581
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
584
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
587
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
592
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
595
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
598
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
601
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
602
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
609
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
611
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
614
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
622
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
655
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
670
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
671
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
673
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
674
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
675
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
676
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
679
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
680
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
681
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
682
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
685
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
688
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
691
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
695
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
698
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
699
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
706
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
708
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
711
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
747
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
750
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
76
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
762
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
763
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
767
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
768
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
769
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
770
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
773
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
774
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
775
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
776
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
779
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
782
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
785
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
789
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
79
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
792
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
793
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
801
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
803
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
806
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
82
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
831
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
835
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
851
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
854
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
855
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
856
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
857
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
859
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
861
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
862
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
863
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
866
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
869
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
872
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
876
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
879
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
880
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
887
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
889
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
89
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
892
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
92
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
948
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
95
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, value32);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
950
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(31), ((X*Oldval_0>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
958
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
962
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
966
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(29), ((Y*Oldval_0>>7) & 0x1));
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
983
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
985
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
990
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
drivers/staging/rtl8723bs/hal/hal_btcoex.c
686
PHY_SetBBReg(padapter, RegAddr, BitMask, Data);
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
22
PHY_SetBBReg(
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
48
PHY_SetBBReg(
drivers/staging/rtl8723bs/hal/odm_DIG.c
137
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
138
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
160
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
161
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
21
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_8 */
drivers/staging/rtl8723bs/hal/odm_DIG.c
212
PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /* stop counting if EDCCA is asserted */
drivers/staging/rtl8723bs/hal/odm_DIG.c
22
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 enable CCX */
drivers/staging/rtl8723bs/hal/odm_DIG.c
23
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /* 0xc0c[7]= 1 max power among all RX ants */
drivers/staging/rtl8723bs/hal/odm_DIG.c
237
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
drivers/staging/rtl8723bs/hal/odm_DIG.c
242
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, 0x7f);
drivers/staging/rtl8723bs/hal/odm_DIG.c
243
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, 0x7f);
drivers/staging/rtl8723bs/hal/odm_DIG.c
280
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
281
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
drivers/staging/rtl8723bs/hal/odm_DIG.c
303
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
drivers/staging/rtl8723bs/hal/odm_DIG.c
305
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
drivers/staging/rtl8723bs/hal/odm_DIG.c
51
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0);
drivers/staging/rtl8723bs/hal/odm_DIG.c
52
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
627
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
629
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
664
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
drivers/staging/rtl8723bs/hal/odm_DIG.c
665
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
65
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
66
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
67
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
68
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
69
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
70
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
71
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
73
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
74
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
75
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
76
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
77
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0);
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
113
PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
153
PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
114
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
118
PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
122
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
123
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
210
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
409
PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
453
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
456
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
459
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
462
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
466
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
469
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
472
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
475
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
479
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
482
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
485
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
488
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
492
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
495
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
498
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
501
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
505
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
508
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
511
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
514
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
629
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
631
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
633
PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
638
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
640
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
643
PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
645
PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
647
PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
108
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
112
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
116
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
119
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
134
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
137
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
drivers/staging/rtl8723bs/include/hal_intf.h
236
#define PHY_SetMacReg PHY_SetBBReg