PCI_IO_BASE_UPPER16
pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
case PCI_IO_BASE_UPPER16:
writel(0x0000ffff, base + PCI_IO_BASE_UPPER16);
writel(0, base + PCI_IO_BASE_UPPER16);
pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_IO_BASE_UPPER16, 0x0000);
pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_IO_BASE_UPPER16, &upper_io_start);
[PCI_IO_BASE_UPPER16 / 4] = {
bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].ro = ~0;
bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].rw = 0;
pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);