PCI_COMMAND_SERR
u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
features &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
| PCI_COMMAND_PARITY | PCI_COMMAND_SERR,
PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK);
| PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
PCI_COMMAND_SERR | \
config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
cmd |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
if (edev->config_space[1] & PCI_COMMAND_SERR)
cmd |= PCI_COMMAND_SERR;
cmd &= ~PCI_COMMAND_SERR;
cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
__raw_writew(PCI_COMMAND_SERR | PCI_COMMAND_WAIT | \
word16 |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
(eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) {
(eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) {
cmd = old | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
reg &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
pci_cmd & ~PCI_COMMAND_SERR);
pci_cmd |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
if (pci_cmd & PCI_COMMAND_SERR)
pci_cmd & ~PCI_COMMAND_SERR);
if (pci_cmd & PCI_COMMAND_SERR) {
pci_cmd |= PCI_COMMAND_SERR;
pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
pci_cmd &= ~PCI_COMMAND_SERR;
status |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR | fbb_enable;
word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
val |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
command &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_SERR);
pci_cmd |= PCI_COMMAND_SERR;
PCI_COMMAND_SERR),
~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
w |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
| PCI_COMMAND_PARITY | PCI_COMMAND_SERR);