drivers/mtd/nand/raw/brcmnand/brcmnand.c

207

[NAND_CMD_READ1] = CMD_NOT_SUPPORTED,

drivers/mtd/nand/raw/cafe_nand.c

221

} else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||

drivers/mtd/nand/raw/fsl_elbc_nand.c

324

case NAND_CMD_READ1:

drivers/mtd/nand/raw/mpc5121_nfc.c

341

case NAND_CMD_READ1:

drivers/mtd/nand/raw/nand_base.c

1164

instrs[0].ctx.cmd.opcode = NAND_CMD_READ1;

drivers/mtd/nand/raw/nand_base.c

1583

instrs[0].ctx.cmd.opcode = NAND_CMD_READ1;

drivers/mtd/nand/raw/nand_legacy.c

269

readcmd = NAND_CMD_READ1;

drivers/mtd/nand/raw/nandsim.c

1077

case NAND_CMD_READ1:

drivers/mtd/nand/raw/nandsim.c

1104

case NAND_CMD_READ1:

drivers/mtd/nand/raw/pl35x-nand-controller.c

1034

PL35X_SMC_ECC_CMD1_READ_END_VALID(NAND_CMD_READ1),

drivers/mtd/nand/raw/pl35x-nand-controller.c

1039

PL35X_SMC_ECC_CMD2_READ_COL_CHG_END_VALID(NAND_CMD_READ1),

drivers/mtd/nand/raw/sh_flctl.c

753

case NAND_CMD_READ1:

drivers/mtd/nand/raw/sh_flctl.c

845

read_cmd = NAND_CMD_READ1;