MT_TX_PWR_CFG_2
{ MT_TX_PWR_CFG_2, 0x3A3A3A3A },
mt76_wr(dev, MT_TX_PWR_CFG_2,
{ MT_TX_PWR_CFG_2, 0x3a3a3a3a },
val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);