MT_TX_PWR_CFG_0
{ MT_TX_PWR_CFG_0, 0x3A3A3A3A },
mt76_wr(dev, MT_TX_PWR_CFG_0,
{ MT_TX_PWR_CFG_0, 0x3a3a3a3a },
mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
mt7601u_wr(dev, MT_TX_PWR_CFG_0, int_to_s6(t->ofdm[1].bw20) << 24 |