arch/x86/kernel/cpu/common.c

610

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

612

wrmsrq(MSR_IA32_S_CET, msr & ~CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

623

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

626

wrmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

650

wrmsrq(MSR_IA32_S_CET, CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

652

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kernel/cpu/common.c

658

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kernel/cpu/common.c

669

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kvm/emulate.c

1492

const u32 MSR_IA32_X_CET = cpl == 3 ? MSR_IA32_U_CET : MSR_IA32_S_CET;

arch/x86/kvm/emulate.c

5104

(s_cet && ctxt->ops->get_msr(ctxt, MSR_IA32_S_CET, &s_cet)))

arch/x86/kvm/svm/svm.c

2786

case MSR_IA32_S_CET:

arch/x86/kvm/svm/svm.c

3027

case MSR_IA32_S_CET:

arch/x86/kvm/svm/svm.c

826

svm_set_intercept_for_msr(vcpu, MSR_IA32_S_CET, MSR_TYPE_RW, !shstk_enabled);

arch/x86/kvm/vmx/nested.c

766

MSR_IA32_S_CET, MSR_TYPE_RW);

arch/x86/kvm/vmx/vmx.c

2259

case MSR_IA32_S_CET:

arch/x86/kvm/vmx/vmx.c

2586

case MSR_IA32_S_CET:

arch/x86/kvm/vmx/vmx.c

4406

vmx_set_intercept_for_msr(vcpu, MSR_IA32_S_CET, MSR_TYPE_RW, intercept);

arch/x86/kvm/x86.c

10085

rdmsrq(MSR_IA32_S_CET, kvm_host.s_cet);

arch/x86/kvm/x86.c

12297

__kvm_emulate_msr_read(vcpu, MSR_IA32_S_CET, &s_cet))

arch/x86/kvm/x86.c

1902

case MSR_IA32_S_CET:

arch/x86/kvm/x86.c

1984

case MSR_IA32_S_CET:

arch/x86/kvm/x86.c

351

MSR_IA32_U_CET, MSR_IA32_S_CET,

arch/x86/kvm/x86.c

7716

case MSR_IA32_S_CET:

tools/testing/selftests/kvm/x86/msrs_test.c

149

msr->index != MSR_IA32_S_CET)

tools/testing/selftests/kvm/x86/msrs_test.c

387

MSR_TEST2(MSR_IA32_S_CET, CET_SHSTK_EN, CET_RESERVED, SHSTK, IBT),

tools/testing/selftests/kvm/x86/msrs_test.c

388

MSR_TEST2(MSR_IA32_S_CET, CET_ENDBR_EN, CET_RESERVED, IBT, SHSTK),