MSR_IA32_SPEC_CTRL
movl $MSR_IA32_SPEC_CTRL, %ecx
movl $MSR_IA32_SPEC_CTRL, %ecx
alternative_msr_write(MSR_IA32_SPEC_CTRL, \
alternative_msr_write(MSR_IA32_SPEC_CTRL, \
native_wrmsrq(MSR_IA32_SPEC_CTRL, val);
wrmsrq(MSR_IA32_SPEC_CTRL, val);
rdmsrq(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
wrmsrq(MSR_IA32_SPEC_CTRL, val);
MSR_IA32_SPEC_CTRL,
case MSR_IA32_SPEC_CTRL:
case MSR_IA32_SPEC_CTRL:
svm_disable_intercept_for_msr(vcpu, MSR_IA32_SPEC_CTRL, MSR_TYPE_RW);
bool spec_ctrl_intercepted = msr_write_intercepted(vcpu, MSR_IA32_SPEC_CTRL);
svm_set_intercept_for_msr(vcpu, MSR_IA32_SPEC_CTRL, MSR_TYPE_RW,
svm_set_intercept_for_msr(vcpu, MSR_IA32_SPEC_CTRL, MSR_TYPE_RW,
nested_vmx_merge_msr_bitmaps_rw(MSR_IA32_SPEC_CTRL);
if (!msr_write_intercepted(vmx, MSR_IA32_SPEC_CTRL))
case MSR_IA32_SPEC_CTRL:
case MSR_IA32_SPEC_CTRL:
MSR_IA32_SPEC_CTRL,
vmx_set_intercept_for_msr(vcpu, MSR_IA32_SPEC_CTRL, MSR_TYPE_RW,
vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
native_wrmsrq(MSR_IA32_SPEC_CTRL, hostval);
if (rdmsrq_safe(MSR_IA32_SPEC_CTRL, &saved_value))
else if (wrmsrq_safe(MSR_IA32_SPEC_CTRL, value))
wrmsrq(MSR_IA32_SPEC_CTRL, saved_value);
MSR_IA32_SPEC_CTRL, MSR_IA32_TSX_CTRL,
{ MSR_IA32_SPEC_CTRL, X86_FEATURE_MSR_SPEC_CTRL },
wrmsrq(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl));
rdmsrq(MSR_IA32_SPEC_CTRL, tmp);
wrmsrq(MSR_IA32_SPEC_CTRL, 0);