MII_ADVERTISE
case MII_ADVERTISE:
case MII_ADVERTISE:
case MII_ADVERTISE:
case MII_ADVERTISE:
port_sgmii_r(dev, port, mmd, MII_ADVERTISE,
port_sgmii_w(dev, port, mmd, MII_ADVERTISE,
} else if (reg == MII_ADVERTISE) {
case MII_ADVERTISE:
err = __mdiodev_modify_changed(&mpcs->mdio, MII_ADVERTISE, 0xffff, adv);
#define MV88E6390_SGMII_ADVERTISE (0x2000 + MII_ADVERTISE)
vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE);
mdio_write(dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising);
reg4 = mdio_read(dev, np->phys[0], MII_ADVERTISE);
np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
np->mii_if.advertising = mdio_read(dev, np->phys[0], MII_ADVERTISE);
et131x_mii_read(adapter, MII_ADVERTISE, &tmp);
val = MII_ADVERTISE << 16 | ADVERTISE_1000XFULL |
val = MII_ADVERTISE << 16 | ADVERTISE_100FULL |
advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE);
amd8111e_mdio_write(dev, lp->ext_phy_addr, MII_ADVERTISE, tmp);
if (alx_write_phy_reg(hw, MII_ADVERTISE, adv) ||
if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 ||
ret_val = atl1e_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
err = atl1e_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
MII_ADVERTISE, mii_advertise_data) != 0) ||
atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
return atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
if ((err = b44_writephy(bp, MII_ADVERTISE, adv)) != 0)
!b44_readphy(bp, MII_ADVERTISE, &local_adv) &&
port->phy_id, MII_ADVERTISE);
bp->mii_adv = MII_ADVERTISE + 0x10;
bp->mii_adv = MII_ADVERTISE;
if (!tg3_readphy(tp, MII_ADVERTISE, ®))
tg3_writephy(tp, MII_ADVERTISE, 0);
err = tg3_writephy(tp, MII_ADVERTISE, new_adv);
tg3_writephy(tp, MII_ADVERTISE, ADVERTISE_ALL);
err = tg3_readphy(tp, MII_ADVERTISE, &val);
err = tg3_readphy(tp, MII_ADVERTISE, &val);
if (tg3_readphy(tp, MII_ADVERTISE, lcladv))
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
tg3_writephy(tp, MII_ADVERTISE, newadv);
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
tg3_writephy(tp, MII_ADVERTISE, adv);
err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv);
(void) simple_mdio_write(phy, MII_ADVERTISE, val);
return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
MII_ADVERTISE, &adv);
err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_ADVERTISE,
mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) &
anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
mii_write (dev, phy_addr, MII_ADVERTISE, anar);
mii_write (dev, phy_addr, MII_ADVERTISE, 0);
anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
mii_write (dev, phy_addr, MII_ADVERTISE, anar);
mii_write (dev, phy_addr, MII_ADVERTISE, 0);
MII_ADVERTISE);
np->mii_if.advertising = mdio_read(dev, phyx, MII_ADVERTISE);
mdio_write (dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising | 0x0400);
mdio_write(dev, np->phys[0], MII_ADVERTISE, ADVERTISE_FULL);
phy_write(tbiphy, MII_ADVERTISE,
adv = phy_read(phy, MII_ADVERTISE);
phy_write(phy, MII_ADVERTISE, adv);
int lpa = phy_read(phy, MII_LPA) & phy_read(phy, MII_ADVERTISE);
case MII_ADVERTISE:
u16 advert = mdio_read(netdev, nic->mii.phy_id, MII_ADVERTISE);
mdio_write(netdev, nic->mii.phy_id, MII_ADVERTISE, advert);
MII_ADVERTISE);
ret_val = e1e_rphy(hw, MII_ADVERTISE, &mii_nway_adv_reg);
ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
case MII_ADVERTISE:
ret_val = e1e_wphy(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
ret_val = e1e_rphy(hw, MII_ADVERTISE, &mii_autoneg_adv_reg);
MII_ADVERTISE, ADVERTISE_ALL |
val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
MII_ADVERTISE, val);
case MII_ADVERTISE:
np->advertising != mdio_read(dev, MII_ADVERTISE))
mdio_write(dev, MII_ADVERTISE, np->advertising);
if ((data->reg_num & 0x1f) == MII_ADVERTISE)
if ((data->reg_num & 0x1f) == MII_ADVERTISE)
np->advertising= mdio_read(dev, MII_ADVERTISE);
reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg);
adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
val = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
mdio_write(ioaddr, phy_id, MII_ADVERTISE, (val & ADVERTISE_SLCT) |
adv = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
ep->mii.advertising = mdio_read(dev, phy, MII_ADVERTISE);
smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
smc_phy_read(dev, phyaddr, MII_ADVERTISE);
u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
cas_phy_write(cp, MII_ADVERTISE,
cas_phy_read(cp, MII_ADVERTISE) |
err = mii_read(np, np->phy_addr, MII_ADVERTISE);
err = mii_write(np, np->phy_addr, MII_ADVERTISE, adv);
hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
case MII_ADVERTISE:
if (addr == MII_ADVERTISE)
advertising |= mii_get_an(mii, MII_ADVERTISE);
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
mii->mdio_write(dev, mii->phy_id, MII_ADVERTISE, tmp);
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
mii->mdio_write(dev, mii->phy_id, MII_ADVERTISE, tmp);
advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE);
case MII_ADVERTISE:
ecmd->advertising |= mii_get_an(mii, MII_ADVERTISE);
return mdiobus_c45_write(bus, addr, MDIO_MMD_VEND2, MII_ADVERTISE,
MII_ADVERTISE, 0xffff, adv);
phy_write(phydev, MII_ADVERTISE, ADVERTISE_CSMA);
err = phy_modify_changed(phydev, MII_ADVERTISE,
adv = phy_read(phydev, MII_ADVERTISE);
#define MV_1GBX_ADVERTISE (0x2000 + MII_ADVERTISE)
err = phy_modify_changed(phydev, MII_ADVERTISE,
err = __phy_modify_changed(phydev, MII_ADVERTISE,
err = __phy_modify_changed(phydev, MII_ADVERTISE,
case MII_ADVERTISE:
err = phy_modify_changed(phydev, MII_ADVERTISE,
return phy_modify_changed(phydev, MII_ADVERTISE,
case MII_ADVERTISE:
if (reg == MII_ADVERTISE)
case MII_ADVERTISE:
if (reg == MII_ADVERTISE)
MII_ADVERTISE, 0xffff, adv);
context->advertise = phy_read(phydev, MII_ADVERTISE);
phy_write(phydev, MII_ADVERTISE, context->advertise);
return phy_modify(phydev, MII_ADVERTISE, ADVERTISE_XNP, 0);
phy_write(phydev, MII_ADVERTISE, ADVERTISE_CSMA);
adv = sungem_phy_read(phy, MII_ADVERTISE);
sungem_phy_write(phy, MII_ADVERTISE, adv);
adv = sungem_phy_read(phy, MII_ADVERTISE);
sungem_phy_write(phy, MII_ADVERTISE, adv);
sungem_phy_write(phy, MII_ADVERTISE, 0x01e0);
adv = sungem_phy_read(phy, MII_ADVERTISE);
sungem_phy_write(phy, MII_ADVERTISE, adv);
asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
dm9601_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
ret = mcs7830_write_phy(dev, MII_ADVERTISE, MCS7830_MII_ADVERTISE);
r8152_mdio_set_bit(tp, MII_ADVERTISE,
orig = r8152_mdio_read(tp, MII_ADVERTISE);
r8152_mdio_write(tp, MII_ADVERTISE, new1);
lcladv = r8152_mdio_read(tp, MII_ADVERTISE);
old = r8152_mdio_read(tp, MII_ADVERTISE);
r8152_mdio_write(tp, MII_ADVERTISE, new1);
lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
sr_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
case MII_ADVERTISE: /* Advertisement control reg */