MASK_21
saa7146_write(dev, MC2, (MASK_05 | MASK_06 | MASK_21 | MASK_22) );
saa7146_write(dev, MC2, (MASK_05 | MASK_21));
saa7146_write(dev, MC2, (MASK_05 | MASK_21));
WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
WRITE_RPS0(MASK_05 | MASK_21); /* => values */
WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
WRITE_RPS0(MASK_21); /* => values */
saa7146_write(dev, MC2, (MASK_05 | MASK_21));
saa7146_write(dev, MC1, MASK_21);
dmas = MASK_22 | MASK_21 | MASK_20;
0 * (MASK_05 | MASK_21) | // HPS_CTRL2
#define CMD_SIG0 MASK_21