MASK_20
saa7146_write(dev,MC1, MASK_20);
WRITE_RPS0(MASK_04 | MASK_20); /* => mask */
WRITE_RPS0(MASK_04 | MASK_20); /* => values */
WRITE_RPS0(MASK_04 | MASK_20); /* => mask */
WRITE_RPS0(MASK_20); /* => values */
saa7146_write(dev, MC1, MASK_20);
WRITE_RPS1(MASK_04 | MASK_20); /* => mask */
WRITE_RPS1(MASK_04 | MASK_20); /* => values */
saa7146_write(dev, MC1, MASK_20);
saa7146_write(dev, MC2, (MASK_04|MASK_20));
saa7146_write(dev, MC2, MASK_04|MASK_20);
WRITE_RPS1(MASK_20 | MASK_04);
saa7146_write(dev, MC2, MASK_04|MASK_20);
dmas = MASK_22 | MASK_21 | MASK_20;
saa7146_write(dev, MC2, (MASK_04 | MASK_20));
saa7146_write(dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
saa7146_write(budget->dev, MC1, MASK_20); // DMA3 off
saa7146_write(dev, MC1, MASK_20); // DMA3 off
saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
saa7146_write(dev, MC2, MASK_04 | MASK_20);
saa7146_write(saa, MC1, MASK_20); /* DMA3 off */