arch/arm/mach-rpc/irq.c

130

val = readb(base + MASK);

arch/arm/mach-rpc/irq.c

131

writeb(val & ~mask, base + MASK);

arch/arm/mach-rpc/irq.c

140

val = readb(base + MASK);

arch/arm/mach-rpc/irq.c

141

writeb(val & ~mask, base + MASK);

arch/arm/mach-rpc/irq.c

149

val = readb(base + MASK);

arch/arm/mach-rpc/irq.c

150

writeb(val | mask, base + MASK);

arch/loongarch/include/asm/hw_breakpoint.h

52

#define LOONGARCH_CSR_NAME_MASK MASK

arch/loongarch/kernel/hw_breakpoint.c

84

GEN_READ_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val);

arch/loongarch/kernel/hw_breakpoint.c

99

GEN_WRITE_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val);

arch/x86/kernel/cpu/mce/severity.c

115

SER, MASK(MCI_UC_AR|MCACOD_SCRUBMSK, MCI_STATUS_UC|MCACOD_SCRUB)

arch/x86/kernel/cpu/mce/severity.c

119

SER, MASK(MCI_UC_AR|MCACOD, MCI_STATUS_UC|MCACOD_L3WB)

arch/x86/kernel/cpu/mce/severity.c

130

SER, MASK(MCI_STATUS_UC|MCI_ADDR|0xffffeff0, MCI_ADDR|0x001000c0),

arch/x86/kernel/cpu/mce/severity.c

137

SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)

arch/x86/kernel/cpu/mce/severity.c

142

MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)

arch/x86/kernel/cpu/mce/severity.c

158

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),

arch/x86/kernel/cpu/mce/severity.c

163

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),

arch/x86/kernel/cpu/mce/severity.c

168

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),

arch/x86/kernel/cpu/mce/severity.c

173

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),

arch/x86/kernel/cpu/mce/severity.c

178

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),

arch/x86/kernel/cpu/mce/severity.c

184

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),

arch/x86/kernel/cpu/mce/severity.c

190

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),

arch/x86/kernel/cpu/mce/severity.c

195

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),

arch/x86/kernel/cpu/mce/severity.c

201

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)

arch/x86/kernel/cpu/mce/severity.c

206

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S)

arch/x86/kernel/cpu/mce/severity.c

210

SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_OVER|MCI_UC_S)

drivers/char/xilinx_hwicap/xilinx_hwicap.c

124

.MASK = 6,

drivers/char/xilinx_hwicap/xilinx_hwicap.c

149

.MASK = 6,

drivers/char/xilinx_hwicap/xilinx_hwicap.c

174

.MASK = 6,

drivers/char/xilinx_hwicap/xilinx_hwicap.c

199

.MASK = 6,

drivers/char/xilinx_hwicap/xilinx_hwicap.h

131

u32 MASK;

drivers/clk/tegra/clk-tegra-periph.c

135

30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \

drivers/clk/tegra/clk-tegra-periph.c

142

30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra-periph.c

149

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra-periph.c

155

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra-periph.c

161

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra-periph.c

168

30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \

drivers/clk/tegra/clk-tegra-periph.c

175

30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \

drivers/clk/tegra/clk-tegra-periph.c

182

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \

drivers/clk/tegra/clk-tegra-periph.c

189

30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \

drivers/clk/tegra/clk-tegra-periph.c

196

29, MASK(3), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \

drivers/clk/tegra/clk-tegra-periph.c

203

30, MASK(2), 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra-periph.c

210

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \

drivers/clk/tegra/clk-tegra-periph.c

750

NODIV("xusb_hs_src", mux_ss_div2_60M, CLK_SOURCE_XUSB_SS_SRC, 25, MASK(1), 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_hs_src, NULL),

drivers/clk/tegra/clk-tegra-periph.c

751

NODIV("xusb_hs_src", mux_ss_div2_60M_ss, CLK_SOURCE_XUSB_SS_SRC, 25, MASK(2), 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_hs_src_4, NULL),

drivers/clk/tegra/clk-tegra-periph.c

752

NODIV("xusb_ssp_src", mux_ss_clkm, CLK_SOURCE_XUSB_SS_SRC, 24, MASK(1), 143, TEGRA_PERIPH_NO_RESET, tegra_clk_xusb_ssp_src, NULL),

drivers/clk/tegra/clk-tegra114.c

119

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/clk/tegra/clk-tegra124.c

99

29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\

drivers/dma/dw/core.c

1046

channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);

drivers/dma/dw/core.c

1047

channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);

drivers/dma/dw/core.c

1048

channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask);

drivers/dma/dw/core.c

1049

channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);

drivers/dma/dw/core.c

1050

channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);

drivers/dma/dw/core.c

1118

channel_clear_bit(dw, MASK.XFER, dwc->mask);

drivers/dma/dw/core.c

1119

channel_clear_bit(dw, MASK.BLOCK, dwc->mask);

drivers/dma/dw/core.c

1120

channel_clear_bit(dw, MASK.ERROR, dwc->mask);

drivers/dma/dw/core.c

122

channel_set_bit(dw, MASK.XFER, dwc->mask);

drivers/dma/dw/core.c

123

channel_set_bit(dw, MASK.ERROR, dwc->mask);

drivers/dma/dw/core.c

488

channel_set_bit(dw, MASK.XFER, dw->all_chan_mask);

drivers/dma/dw/core.c

489

channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask);

drivers/dma/dw/core.c

512

channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);

drivers/dma/dw/core.c

513

channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);

drivers/dma/dw/core.c

514

channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);

drivers/dma/dw/core.c

523

channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1);

drivers/dma/dw/core.c

524

channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1);

drivers/dma/dw/core.c

525

channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1);

drivers/dma/dw/core.c

526

channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1);

drivers/dma/dw/core.c

527

channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1);

drivers/dma/dw/regs.h

70

struct dw_dma_irq_regs MASK; /* rw (set = irq enabled) */

drivers/dma/idma64.c

41

channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask);

drivers/dma/idma64.c

42

channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask);

drivers/dma/idma64.c

43

channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask);

drivers/dma/idma64.c

44

channel_clear_bit(idma64, MASK(DST_TRAN), idma64->all_chan_mask);

drivers/dma/idma64.c

45

channel_clear_bit(idma64, MASK(ERROR), idma64->all_chan_mask);

drivers/dma/idma64.c

71

channel_set_bit(idma64, MASK(XFER), idma64c->mask);

drivers/dma/idma64.c

72

channel_set_bit(idma64, MASK(ERROR), idma64c->mask);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

147

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

485

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

915

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

929

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

764

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

339

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

342

MASK,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

845

MASK,

drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h

41

DDC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\

drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h

64

DDC_GPIO_VGA_REG_LIST_ENTRY(MASK, cd),\

drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h

81

DDC_GPIO_I2C_REG_LIST_ENTRY(MASK, cd),\

drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h

38

GENERIC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\

drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h

46

HPD_GPIO_REG_LIST_ENTRY(MASK, cd, id),\

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

152

REG_UPDATE(MASK_reg, MASK, 1);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

158

REG_UPDATE(MASK_reg, MASK, 1);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

164

REG_UPDATE(MASK_reg, MASK, 1);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

168

REG_UPDATE(MASK_reg, MASK, 0);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

172

REG_UPDATE(MASK_reg, MASK, 0);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

45

REG_GET(MASK_reg, MASK, &gpio->store.mask);

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c

54

REG_UPDATE(MASK_reg, MASK, gpio->store.mask);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

351

dw_update_bits(base + PHY_TMR_CFG, 24, MASK(8), phy->hs2lp_time);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

352

dw_update_bits(base + PHY_TMR_CFG, 16, MASK(8), phy->lp2hs_time);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

353

dw_update_bits(base + PHY_TMR_LPCLK_CFG, 16, MASK(10),

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

355

dw_update_bits(base + PHY_TMR_LPCLK_CFG, 0, MASK(10),

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

357

dw_update_bits(base + CLK_DATA_TMR_CFG, 8, MASK(8),

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

359

dw_update_bits(base + CLK_DATA_TMR_CFG, 0, MASK(8),

drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h

17

#define FRM_END_START_MASK MASK(2)

drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h

50

#define CH_OVLY_SEL_MASK MASK(2)

drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h

99

#define QOSGENERATOR_MODE_MASK MASK(2)

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

104

MASK(1), !!val);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

130

writel(MASK(32), base + ADE_SOFT_RST_SEL(0));

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

131

writel(MASK(32), base + ADE_SOFT_RST_SEL(1));

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

132

writel(MASK(32), base + ADE_RELOAD_DIS(0));

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

133

writel(MASK(32), base + ADE_RELOAD_DIS(1));

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

287

MASK(1), 1);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

304

MASK(1), 0);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

320

MASK(1), 1);

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

701

MASK(1), 0);

drivers/gpu/drm/i915/i915_syncmap.c

111

return (id >> p->height) & MASK;

drivers/gpu/drm/i915/i915_syncmap.c

118

return id & MASK;

drivers/gpu/drm/i915/i915_syncmap.c

301

idx = p->prefix >> (above - SHIFT) & MASK;

drivers/gpu/drm/i915/selftests/i915_syncmap.c

414

u64 context = i915_prandom_u64_state(&prng) & ~MASK;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

363

regp->CRTC[NV_CIO_CR_CELL_HT_INDEX] = ((mode->flags & DRM_MODE_FLAG_DBLSCAN) ? MASK(NV_CIO_CR_CELL_HT_SCANDBL) : 0) |

drivers/gpu/drm/nouveau/dispnv04/crtc.c

393

MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

744

tmp |= MASK(NV_CIO_CRE_RCR_ENDIAN_BIG);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

46

MASK(NV_CIO_CRE_HCUR_ASI) |

drivers/gpu/drm/nouveau/dispnv04/cursor.c

52

MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);

drivers/gpu/drm/nouveau/dispnv04/dac.c

168

saved_pi & ~(0x80 | MASK(NV_CIO_CRE_PIXEL_FORMAT)));

drivers/gpu/drm/nouveau/dispnv04/hw.h

35

(((src) >> (srclowbit)) << (0 ? outfield)) & MASK(outfield))

drivers/gpu/drm/nouveau/dispnv04/hw.h

379

*curctl1 |= MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);

drivers/gpu/drm/nouveau/dispnv04/hw.h

381

*curctl1 &= ~MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

72

pll->m = (val >> GPCPLL_COEFF_M_SHIFT) & MASK(GPCPLL_COEFF_M_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

73

pll->n = (val >> GPCPLL_COEFF_N_SHIFT) & MASK(GPCPLL_COEFF_N_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

74

pll->pl = (val >> GPCPLL_COEFF_P_SHIFT) & MASK(GPCPLL_COEFF_P_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

83

val = (pll->m & MASK(GPCPLL_COEFF_M_WIDTH)) << GPCPLL_COEFF_M_SHIFT;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

84

val |= (pll->n & MASK(GPCPLL_COEFF_N_WIDTH)) << GPCPLL_COEFF_N_SHIFT;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

85

val |= (pll->pl & MASK(GPCPLL_COEFF_P_WIDTH)) << GPCPLL_COEFF_P_SHIFT;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

49

(MASK(GPCPLL_CFG3_VCO_CTRL_WIDTH) << GPCPLL_CFG3_VCO_CTRL_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

59

(MASK(GPCPLL_COEFF_N_WIDTH) << GPCPLL_COEFF_N_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

87

#define GPC2CLK_OUT_VCODIV_MASK (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << \

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

92

#define GPC2CLK_OUT_INIT_MASK ((MASK(GPC2CLK_OUT_SDIV14_INDIV4_WIDTH) << \

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

94

| (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << GPC2CLK_OUT_VCODIV_SHIFT)\

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

95

| (MASK(GPC2CLK_OUT_BYPDIV_WIDTH) << GPC2CLK_OUT_BYPDIV_SHIFT))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

170

MASK(GPCPLL_CFG2_SDM_DIN_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

202

dvfs->dfs_coeff = min_t(u32, coeff, MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

255

rem = ((u32)n) & MASK(DFS_DET_RANGE);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

260

*sdm_din = (rem >> BITS_PER_BYTE) & MASK(GPCPLL_CFG2_SDM_DIN_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

42

(MASK(GPCPLL_CFG2_SDM_DIN_WIDTH) << GPCPLL_CFG2_SDM_DIN_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

46

(MASK(GPCPLL_CFG2_SDM_DIN_NEW_WIDTH) << GPCPLL_CFG2_SDM_DIN_NEW_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

537

nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, MASK(DFS_DET_RANGE + 1),

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

54

(MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH) << GPCPLL_DVFS0_DFS_COEFF_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

58

(MASK(GPCPLL_DVFS0_DFS_DET_MAX_WIDTH) << GPCPLL_DVFS0_DFS_DET_MAX_SHIFT)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

789

data &= MASK(GPCPLL_CFG3_PLL_DFS_TESTOUT_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

830

MASK(BYPASSCTRL_SYS_GPCPLL_WIDTH) << BYPASSCTRL_SYS_GPCPLL_SHIFT,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

956

MASK(FUSE_RESERVED_CALIB0_FUSE_REV_WIDTH);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

965

MASK(FUSE_RESERVED_CALIB0_SLOPE_INT_WIDTH)) * 1000 +

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

967

MASK(FUSE_RESERVED_CALIB0_SLOPE_FRAC_WIDTH));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

971

MASK(FUSE_RESERVED_CALIB0_INTERCEPT_INT_WIDTH)) * 1000 +

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

973

MASK(FUSE_RESERVED_CALIB0_INTERCEPT_FRAC_WIDTH)) * 100;

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

645

x_mask = MASK(x_bits);

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

646

y_mask = MASK(y_bits);

drivers/infiniband/hw/hfi1/file_ops.c

1138

HFI1_CAP_UGET_MASK(uctxt->flags, MASK) |

drivers/media/tuners/tda18250.c

516

[MASK] = { 0x77, 0xff, 0xff, 0x87, 0xf0, 0x78, 0x07, 0xe0,

drivers/media/tuners/tda18250.c

587

delsys_params[MASK][i], delsys_params[j][i]);

drivers/net/ethernet/atheros/alx/hw.h

146

#define DESC_GET(_x, _name) ((_x) >> _name##SHIFT & _name##MASK)

drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c

1110

(off & MASK(16));

drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c

20

#define GET_MEM_OFFS_2M(addr) (addr & MASK(18))

drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c

1138

*addr = ahw->pci_base0 + CRB_INDIRECT_2M + (off & MASK(16));

drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c

17

#define GET_MEM_OFFS_2M(addr) (addr & MASK(18))

drivers/platform/x86/compal-laptop.c

367

#define SIMPLE_MASKED_STORE_SHOW(NAME, ADDR, MASK) \

drivers/platform/x86/compal-laptop.c

371

return sysfs_emit(buf, "%d\n", ((ec_read_u8(ADDR) & MASK) != 0)); \

drivers/platform/x86/compal-laptop.c

380

ec_write(ADDR, state ? (old_val | MASK) : (old_val & ~MASK)); \

drivers/platform/x86/intel/telemetry/debugfs.c

67

#define TELEM_CHECK_AND_PARSE_EVTS(EVTID, EVTNUM, BUF, EVTLOG, EVTDAT, MASK) { \

drivers/platform/x86/intel/telemetry/debugfs.c

71

(MASK); \

drivers/scsi/aic7xxx/aicasm/aicasm_gram.y

1436

if (field_type != MASK && value == 0) {

drivers/scsi/aic7xxx/aicasm/aicasm_gram.y

1510

case MASK:

drivers/scsi/aic7xxx/aicasm/aicasm_gram.y

1895

if ((node->symbol->type == MASK

drivers/scsi/aic7xxx/aicasm/aicasm_gram.y

528

process_field(MASK, $2, $3.value);

drivers/scsi/aic7xxx/aicasm/aicasm_gram.y

707

case MASK:

drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c

102

case MASK:

drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c

244

case MASK:

drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c

502

case MASK:

drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c

629

case MASK:

drivers/scsi/ncr53c8xx.c

2397

SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),

drivers/scsi/ncr53c8xx.c

2846

SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),

drivers/scsi/ncr53c8xx.c

2924

SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),

drivers/scsi/ncr53c8xx.c

3260

SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),

drivers/scsi/ncr53c8xx.c

7283

cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));

drivers/scsi/ncr53c8xx.c

7373

cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));

drivers/scsi/ncr53c8xx.c

8230

cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));

drivers/scsi/qla2xxx/qla_nx.c

24

#define GET_MEM_OFFS_2M(addr) (addr & MASK(18))

drivers/scsi/qla2xxx/qla_nx.c

379

*off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase;

drivers/scsi/qla4xxx/ql4_nx.c

25

#define GET_MEM_OFFS_2M(addr) (addr & MASK(18))

drivers/scsi/qla4xxx/ql4_nx.c

375

*off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase;

drivers/scsi/sym53c8xx_2/sym_fw1.h

1187

SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1207

SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1263

SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1283

SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1390

SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1392

SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1398

SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

1591

SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

236

SCR_INT ^ IFTRUE (MASK (SEM, SEM)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

363

SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

453

SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

478

SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

538

SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

704

SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),

drivers/scsi/sym53c8xx_2/sym_fw1.h

949

SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),

drivers/scsi/sym53c8xx_2/sym_fw1.h

955

SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1073

SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1093

SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1138

SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1158

SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1269

SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1271

SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1277

SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1464

SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1612

SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED))),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1619

SCR_JUMPR ^ IFFALSE (MASK (HF_DP_SAVED, HF_DP_SAVED)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1630

SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1))),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1632

SCR_JUMPR ^ IFFALSE (MASK (HF_IN_PM0, HF_IN_PM0)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1663

SCR_JUMP ^ IFTRUE (MASK (HF_ACT_PM, HF_ACT_PM)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1675

SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

1705

SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

228

SCR_INT ^ IFTRUE (MASK (SEM, SEM)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

316

SCR_INT ^ IFTRUE (MASK (HX_DMAP_DIRTY, HX_DMAP_DIRTY)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

348

SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

438

SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

462

SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

521

SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

681

SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),

drivers/scsi/sym53c8xx_2/sym_fw2.h

898

SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),

drivers/scsi/sym53c8xx_2/sym_fw2.h

904

SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),

drivers/scsi/vmw_pvscsi.c

1106

MASK(msg_entries));

drivers/scsi/vmw_pvscsi.c

667

MASK(cmp_entries));

drivers/scsi/vmw_pvscsi.c

717

e = adapter->req_ring + (s->reqProdIdx & MASK(req_entries));

drivers/scsi/vmw_pvscsi.h

410

#define PVSCSI_INTR_CMPL_MASK MASK(2)

drivers/scsi/vmw_pvscsi.h

414

#define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)

drivers/scsi/vmw_pvscsi.h

416

#define PVSCSI_INTR_ALL_SUPPORTED MASK(4)

drivers/tty/n_tty.c

1009

while (MASK(tail) != MASK(ldata->canon_head)) {

drivers/tty/n_tty.c

1238

set_bit(MASK(ldata->read_head), ldata->read_flags);

drivers/tty/n_tty.c

1277

while (MASK(tail) != MASK(ldata->read_head)) {

drivers/tty/n_tty.c

135

return ldata->read_buf[MASK(i)];

drivers/tty/n_tty.c

140

return &ldata->read_buf[MASK(i)];

drivers/tty/n_tty.c

146

return ldata->echo_buf[MASK(i)];

drivers/tty/n_tty.c

1505

size_t head = MASK(ldata->read_head);

drivers/tty/n_tty.c

151

return &ldata->echo_buf[MASK(i)];

drivers/tty/n_tty.c

1785

set_bit(MASK(ldata->read_head - 1), ldata->read_flags);

drivers/tty/n_tty.c

1944

size_t tail = MASK(ldata->read_tail);

drivers/tty/n_tty.c

2007

tail = MASK(ldata->read_tail);

drivers/tty/n_tty.c

2470

while (MASK(head) != MASK(tail)) {

drivers/tty/n_tty.c

2471

if (test_bit(MASK(tail), ldata->read_flags) &&

drivers/tty/n_tty.c

570

if (MASK(ldata->echo_commit) == MASK(*tail + 1))

drivers/tty/n_tty.c

583

if (MASK(ldata->echo_commit) == MASK(*tail + 2))

drivers/tty/n_tty.c

686

while (MASK(ldata->echo_commit) != MASK(tail)) {

drivers/tty/n_tty.c

959

while (MASK(ldata->read_head) != MASK(ldata->canon_head)) {

drivers/tty/n_tty.c

967

MASK(head) != MASK(ldata->canon_head));

include/linux/irqchip/arm-gic-v3.h

181

GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

183

GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

208

GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

210

GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

277

GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

279

GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

315

GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

317

GIC_BASER_CACHEABILITY(GICR_VPENDBASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

420

GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

422

GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

447

GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK)

include/linux/irqchip/arm-gic-v3.h

450

GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, MASK)

include/linux/irqchip/arm-gic-v3.h

481

#define GITS_BASER_PAGE_SIZE_MASK __GITS_BASER_PSZ(MASK)

include/linux/soc/ti/knav_dma.h

18

#define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)

include/linux/soc/ti/knav_dma.h

22

#define KNAV_DMA_DESC_TAG_MASK MASK(8)

include/linux/soc/ti/knav_dma.h

30

#define KNAV_DMA_DESC_PSLEN_MASK MASK(6)

include/linux/soc/ti/knav_dma.h

32

#define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)

include/linux/soc/ti/knav_dma.h

34

#define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)

include/linux/soc/ti/knav_dma.h

36

#define KNAV_DMA_DESC_RETQ_MASK MASK(14)

include/linux/soc/ti/knav_dma.h

37

#define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)

include/linux/soc/ti/knav_dma.h

38

#define KNAV_DMA_DESC_EFLAGS_MASK MASK(4)

include/video/gbe.h

84

( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )

include/video/gbe.h

86

( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) )

kernel/debug/kdb/kdb_main.c

1987

if (KDB_DEBUG(MASK))

kernel/debug/kdb/kdb_main.c

1989

(kdb_flags & KDB_DEBUG(MASK)) >> KDB_DEBUG_FLAG_SHIFT);

kernel/debug/kdb/kdb_main.c

421

kdb_flags = (kdb_flags & ~KDB_DEBUG(MASK))

net/mac80211/debugfs_sta.c

732

"TF-MAC-PAD-DUR-%dUS", MASK, "UNKNOWN");

net/openvswitch/datapath.h

338

#define OVS_MASKED(OLD, KEY, MASK) ((KEY) | ((OLD) & ~(MASK)))

net/openvswitch/datapath.h

339

#define OVS_SET_MASKED(OLD, KEY, MASK) ((OLD) = OVS_MASKED(OLD, KEY, MASK))

sound/drivers/vx/vx_mixer.c

775

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/i2c/cs8427.c

495

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/i2c/other/ak4113.c

397

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),

sound/i2c/other/ak4114.c

352

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/i2c/other/ak4114.c

367

.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),

sound/i2c/other/ak4117.c

338

.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),

sound/pci/ca0106/ca0106_mixer.c

578

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/cs46xx/cs46xx_lib.c

2271

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/ctxfi/ctmixer.c

732

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/pci/emu10k1/emu10k1x.c

1093

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/emu10k1/emumixer.c

1423

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/ens1370.c

1424

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/ice1712/aureon.c

1825

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),

sound/pci/oxygen/oxygen_mixer.c

797

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),

sound/pci/pcxhr/pcxhr_mixer.c

1012

.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),

sound/pci/pcxhr/pcxhr_mixer.c

996

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/pci/trident/trident_main.c

2387

.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),

sound/soc/atmel/mchp-spdifrx.c

901

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),

sound/soc/atmel/mchp-spdiftx.c

668

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/soc/codecs/ak4613.c

428

[AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2), MASK(2), MASK(2)},

sound/soc/codecs/ak4613.c

429

[AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12), MASK(12)},

sound/soc/codecs/ak4613.c

430

[AK4613_CONFIG_MODE_TDM256] = { MASK(4), MASK(8), MASK(8)|MASK(12), MASK(8)|MASK(12)},

sound/soc/codecs/ak4613.c

431

[AK4613_CONFIG_MODE_TDM128] = { MASK(4), MASK(4), MASK(4)|MASK(8), MASK(4)|MASK(8)|MASK(12)},

sound/soc/codecs/hdmi-codec.c

773

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/soc/img/img-spdif-in.c

575

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),

sound/soc/img/img-spdif-out.c

190

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/soc/meson/axg-spdifin.c

313

.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK), \

sound/soc/sunxi/sun4i-spdif.c

495

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/usb/mixer_quirks.c

2048

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

sound/x86/intel_hdmi_audio.c

1441

.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),

tools/perf/dlfilters/dlfilter-show-cycles.c

49

__u32 pos = tid & MASK;

tools/testing/selftests/bpf/progs/cpumask_common.h

18

private(MASK) static struct bpf_cpumask __kptr * global_mask;

tools/testing/selftests/bpf/progs/cpumask_success.c

79

private(MASK) static struct bpf_cpumask __kptr * global_mask_array[2];

tools/testing/selftests/bpf/progs/cpumask_success.c

80

private(MASK) static struct bpf_cpumask __kptr * global_mask_array_l2[2][1];

tools/testing/selftests/bpf/progs/cpumask_success.c

81

private(MASK) static struct bpf_cpumask __kptr * global_mask_array_one[1];

tools/testing/selftests/bpf/progs/cpumask_success.c

82

private(MASK) static struct kptr_nested global_mask_nested[2];

tools/testing/selftests/bpf/progs/test_pkt_md_access.c

11

#define TEST_FIELD(TYPE, FIELD, MASK) \

tools/testing/selftests/bpf/progs/test_pkt_md_access.c

14

if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \

tools/testing/selftests/bpf/progs/test_pkt_md_access.c

19

#define TEST_FIELD(TYPE, FIELD, MASK) \

tools/testing/selftests/bpf/progs/test_pkt_md_access.c

23

if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \

tools/testing/selftests/kvm/arm64/set_id_regs.c

47

#define __REG_FTR_BITS(NAME, SIGNED, TYPE, SHIFT, MASK, SAFE_VAL) \

tools/testing/selftests/kvm/arm64/set_id_regs.c

53

.mask = MASK, \

tools/testing/selftests/kvm/include/arm64/gic_v3.h

181

GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

183

GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

208

GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

210

GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

277

GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

279

GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

315

GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

317

GIC_BASER_CACHEABILITY(GICR_VPENDBASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

419

GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

421

GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

446

GIC_BASER_CACHEABILITY(GITS_BASER, INNER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

449

GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, MASK)

tools/testing/selftests/kvm/include/arm64/gic_v3.h

480

#define GITS_BASER_PAGE_SIZE_MASK __GITS_BASER_PSZ(MASK)