arch/alpha/boot/bootp.c

77

pcb_va->ptbr = L1[1] >> 32;

arch/alpha/boot/bootpz.c

125

pcb_va->ptbr = L1[1] >> 32;

arch/alpha/boot/main.c

71

pcb_va->ptbr = L1[1] >> 32;

arch/powerpc/perf/generic-compat-pmu.c

109

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/generic-compat-pmu.c

110

CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);

arch/powerpc/perf/generic-compat-pmu.c

111

CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);

arch/powerpc/perf/isa207-common.c

223

ret = PH(LVL, L1) | LEVEL(L1) | P(SNOOP, HIT);

arch/powerpc/perf/isa207-common.c

301

ret = PM(LVL, L1);

arch/powerpc/perf/power10-pmu.c

133

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power10-pmu.c

134

CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);

arch/powerpc/perf/power10-pmu.c

135

CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_LD_PREFETCH_CACHE_LINE_MISS);

arch/powerpc/perf/power10-pmu.c

136

CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);

arch/powerpc/perf/power10-pmu.c

137

CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);

arch/powerpc/perf/power10-pmu.c

138

CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);

arch/powerpc/perf/power10-pmu.c

139

CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_REQ);

arch/powerpc/perf/power8-pmu.c

133

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power8-pmu.c

134

CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);

arch/powerpc/perf/power8-pmu.c

136

CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_L1_PREF);

arch/powerpc/perf/power8-pmu.c

137

CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);

arch/powerpc/perf/power8-pmu.c

138

CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);

arch/powerpc/perf/power8-pmu.c

139

CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);

arch/powerpc/perf/power8-pmu.c

140

CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE);

arch/powerpc/perf/power9-pmu.c

177

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1_FIN);

arch/powerpc/perf/power9-pmu.c

178

CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);

arch/powerpc/perf/power9-pmu.c

179

CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_L1_PREF);

arch/powerpc/perf/power9-pmu.c

180

CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);

arch/powerpc/perf/power9-pmu.c

181

CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);

arch/powerpc/perf/power9-pmu.c

182

CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);

arch/powerpc/perf/power9-pmu.c

183

CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE);

arch/sparc/net/bpf_jit_comp_64.c

221

[BPF_REG_7] = L1,

arch/x86/events/amd/ibs.c

910

return L(L1) | LN(L1);

arch/x86/events/intel/ds.c

127

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x01: L1 local */

arch/x86/events/intel/ds.c

235

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x01: L1 hit */

arch/x86/events/intel/ds.c

236

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x02: L1 hit */

arch/x86/events/intel/ds.c

273

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x02: L1 hit */

arch/x86/events/intel/ds.c

295

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x01: L1 hit */

arch/x86/events/intel/ds.c

374

u64 val = P(OP, STORE) | P(SNOOP, NA) | P(LVL, L1) | P(TLB, L2);

arch/x86/events/intel/ds.c

447

*val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);

arch/x86/events/intel/ds.c

518

val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);

arch/x86/events/intel/ds.c

553

val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);

arch/x86/events/intel/ds.c

611

val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);

drivers/cpufreq/s5pv210-cpufreq.c

126

{0, L1, 800*1000},

drivers/cpufreq/s5pv210-cpufreq.c

149

[L1] = {

drivers/pci/pcie/aspm.c

1657

ASPM_ATTR(l1_aspm, L1)

drivers/pci/pcie/aspm.c

810

FLAG(override, L1, " L1"));

drivers/perf/dwc_pcie_pmu.c

198

DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1, 0x04),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1488

SIG_EXPR_LIST_DECL_SINGLE(L1, GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1489

SIG_EXPR_LIST_DECL_SINGLE(L1, ADC4, ADC4);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1490

PIN_DECL_(L1, SIG_EXPR_LIST_PTR(L1, GPIOW4), SIG_EXPR_LIST_PTR(L1, ADC4));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1491

FUNC_GROUP_DECL(ADC4, L1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2045

ASPEED_PINCTRL_PIN(L1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2498

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, L1, L1, SCUA8, 8),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2499

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, L1, L1, SCUA8, 8),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2046

ASPEED_PINCTRL_PIN(L1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

657

SIG_EXPR_LIST_DECL_SINGLE(L1, SCL6, I2C6, I2C6_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

658

PIN_DECL_1(L1, GPIOK2, SCL6);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

664

FUNC_GROUP_DECL(I2C6, L1, N2);

lib/test_dynamic_debug.c

133

prdbg(L1);

security/apparmor/include/label.h

234

#define fn_for_each2_XXX(L1, L2, P, FN, ...) \

security/apparmor/include/label.h

238

label_for_each ## __VA_ARGS__(i, (L1), (L2), (P)) { \

security/apparmor/include/label.h

244

#define fn_for_each_in_merge(L1, L2, P, FN) \

security/apparmor/include/label.h

245

fn_for_each2_XXX((L1), (L2), P, FN, _in_merge)

security/apparmor/include/label.h

246

#define fn_for_each_not_in_set(L1, L2, P, FN) \

security/apparmor/include/label.h

247

fn_for_each2_XXX((L1), (L2), P, FN, _not_in_set)

security/apparmor/include/perms.h

186

#define xcheck_ns_labels(L1, L2, FN, args...) \

security/apparmor/include/perms.h

189

fn_for_each((L1), __p1, FN(__p1, (L2), args)); \

security/apparmor/include/perms.h

193

#define xcheck_labels_profiles(L1, L2, FN, args...) \

security/apparmor/include/perms.h

194

xcheck_ns_labels((L1), (L2), xcheck_ns_profile_label, (FN), args)

security/apparmor/include/perms.h

196

#define xcheck_labels(L1, L2, P, FN1, FN2) \

security/apparmor/include/perms.h

197

xcheck(fn_for_each((L1), (P), (FN1)), fn_for_each((L2), (P), (FN2)))

tools/perf/util/intel-pt.c

2289

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* L1 hit|SNP None */

tools/perf/util/intel-pt.c

2309

OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* L1 hit|SNP None */

tools/perf/util/intel-pt.c

2337

*val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);

tools/perf/util/mem-events.c

681

if (lvl & P(LVL, L1 )) stats->ld_l1hit++;

tools/perf/util/mem-events.c

747

if (lvl & P(LVL, L1 )) stats->st_l1hit++;

tools/perf/util/mem-events.c

750

if (lvl & P(LVL, L1)) stats->st_l1miss++;