arch/mips/alchemy/board-xxs1500.c

68

__raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));

arch/mips/alchemy/common/clock.c

109

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x))))

arch/mips/alchemy/common/dbdma.c

1015

addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

1027

addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

1034

addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

322

dcp = KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

61

(dbdma_global_t *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

990

addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR);

arch/mips/alchemy/common/dbdma.c

997

addr = (void __iomem *)KSEG1ADDR(AU1550_DBDMA_PHYS_ADDR);

arch/mips/alchemy/common/dma.c

184

chan->io = (void __iomem *)(KSEG1ADDR(AU1000_DMA_PHYS_ADDR) +

arch/mips/alchemy/common/irq.c

291

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

301

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

311

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

321

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

331

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

345

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

359

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

371

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

438

base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

442

base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

763

alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR),

arch/mips/alchemy/common/irq.c

765

alchemy_ic_suspend_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR),

arch/mips/alchemy/common/irq.c

772

alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR),

arch/mips/alchemy/common/irq.c

774

alchemy_ic_resume_one((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR),

arch/mips/alchemy/common/irq.c

780

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

811

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

828

base = (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

864

unsigned long r = __raw_readl((void __iomem *)KSEG1ADDR(addr)); \

arch/mips/alchemy/common/irq.c

889

ic_init((void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR));

arch/mips/alchemy/common/irq.c

890

ic_init((void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR));

arch/mips/alchemy/common/irq.c

913

base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR);

arch/mips/alchemy/common/irq.c

916

base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

268

(void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

296

(void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

363

(void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

386

(void __iomem *)KSEG1ADDR(AU1200_USB_CTL_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

394

void __iomem *base = (void __iomem *)KSEG1ADDR(rb + reg);

arch/mips/alchemy/common/usb.c

427

void __iomem *base = (void __iomem *)KSEG1ADDR(rb);

arch/mips/alchemy/common/usb.c

514

void __iomem *base = (void __iomem *)KSEG1ADDR(br);

arch/mips/alchemy/common/usb.c

532

(void __iomem *)KSEG1ADDR(AU1200_USB_OTG_PHYS_ADDR);

arch/mips/alchemy/common/usb.c

552

(void __iomem *)KSEG1ADDR(AU1300_USB_CTL_PHYS_ADDR);

arch/mips/alchemy/common/vss.c

18

#define VSS_ADDR(blk) (KSEG1ADDR(AU1300_VSS_PHYS_ADDR) + (blk * 0x0c))

arch/mips/alchemy/devboards/bcsr.c

33

bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys));

arch/mips/alchemy/devboards/bcsr.c

34

bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys));

arch/mips/alchemy/devboards/db1200.c

909

(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1300.c

817

(void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1300.c

820

(void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1300.c

830

(void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1550.c

47

base = (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR);

arch/mips/alchemy/devboards/db1550.c

609

(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1550.c

612

(void __iomem *)KSEG1ADDR(AU1550_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1550.c

616

(void __iomem *)KSEG1ADDR(AU1550_PSC0_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/alchemy/devboards/db1550.c

619

(void __iomem *)KSEG1ADDR(AU1550_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);

arch/mips/ath25/early_printk.c

35

base = (void __iomem *)(KSEG1ADDR(AR2315_UART0_BASE));

arch/mips/ath25/early_printk.c

37

base = (void __iomem *)(KSEG1ADDR(AR5312_UART0_BASE));

arch/mips/ath79/early_printk.c

102

base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));

arch/mips/ath79/early_printk.c

35

void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));

arch/mips/ath79/early_printk.c

44

void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));

arch/mips/ath79/early_printk.c

91

gpio_base = (void __iomem *)KSEG1ADDR(AR71XX_GPIO_BASE);

arch/mips/bcm63xx/boards/board_bcm963xx.c

746

boot_addr = (u8 *)KSEG1ADDR(val);

arch/mips/include/asm/mach-au1x00/au1000.h

606

void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/au1000.h

613

void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/au1000.h

622

void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/au1000.h

629

void __iomem *b = (void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/au1000.h

729

void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys);

arch/mips/include/asm/mach-au1x00/au1000.h

744

void __iomem *addr = (void __iomem *)KSEG1ADDR(uart_phys);

arch/mips/include/asm/mach-au1x00/au1000.h

752

void __iomem *base = (void __iomem *)KSEG1ADDR(uart_phys);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

275

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

286

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

300

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

309

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

361

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

443

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1000.h

457

void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);

arch/mips/include/asm/mach-au1x00/gpio-au1300.h

27

(void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR)

arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h

26

#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR)

arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h

79

#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR)

arch/mips/include/asm/mach-ralink/mt7620.h

14

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))

arch/mips/include/asm/mach-ralink/mt7621.h

10

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))

arch/mips/include/asm/mach-ralink/rt288x.h

14

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))

arch/mips/include/asm/mach-ralink/rt305x.h

46

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))

arch/mips/include/asm/mach-ralink/rt3883.h

13

#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))

arch/mips/include/asm/mach-rc32434/rb.h

11

#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))

arch/mips/lantiq/prom.c

52

char **argv = (char **) KSEG1ADDR(fw_arg1);

arch/mips/lantiq/prom.c

58

char *p = (char *) KSEG1ADDR(argv[i]);

arch/mips/ralink/bootrom.c

13

static void __iomem *membase = (void __iomem *) KSEG1ADDR(BOOTROM_OFFSET);

arch/mips/ralink/early_printk.c

31

static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);

arch/mips/ralink/early_printk.c

32

static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);

arch/mips/ralink/early_printk.c

64

uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +

arch/mips/ralink/mt7621.c

66

void *dm = (void *)KSEG1ADDR(&detect_magic);

arch/mips/ralink/prom.c

39

argv = (char **) KSEG1ADDR(fw_arg1);

arch/mips/ralink/prom.c

48

char *p = (char *) KSEG1ADDR(argv[i]);

arch/mips/rb532/irq.c

62

.base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},

arch/mips/rb532/irq.c

65

.base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)},

arch/mips/rb532/irq.c

68

.base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)},

arch/mips/rb532/irq.c

71

.base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)},

arch/mips/rb532/irq.c

74

.base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)}

arch/mips/rb532/serial.c

44

.membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),

arch/mips/rb532/setup.c

33

((void (*)(void)) KSEG1ADDR(0x1FC00000u))();

drivers/mtd/nand/raw/au1550nd.c

120

(void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h

116

while (!(len = *(u16 *) KSEG1ADDR(head->data)))

drivers/video/fbdev/au1100fb.c

771

fbdev->regs = (struct au1100fb_regs*)KSEG1ADDR(fbdev->info.fix.mmio_start);

include/video/maxinefb.h

16

#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)

include/video/maxinefb.h

22

#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)