arch/mips/dec/ecc-berr.c

227

volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);

arch/mips/dec/ecc-berr.c

229

kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);

arch/mips/dec/ecc-berr.c

230

kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);

arch/mips/dec/kn02-irq.c

30

volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

arch/mips/dec/kn02-irq.c

39

volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

arch/mips/dec/kn02-irq.c

62

volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +

arch/mips/dec/prom/identify.c

87

dec_kn_slot_base = KN02_SLOT_BASE;

drivers/mtd/devices/ms02-nv.c

277

csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);