IntReq
outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD); /* Ack IRQ */
outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
outw(SetStatusEnb | AdapterFailure | IntReq | StatsFull |
outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
StatsFull | HostError | TxComplete | IntReq
iowrite16(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
if (status & IntReq) { /* Restore all interrupt sources. */
if (status & IntReq) {
if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
if (status & IntReq) {
if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);