IRQ
# counters interrupt to IRQ 6
ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",
ivpu_dbg(vdev, IRQ, "Survivability IRQ\n");
ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",
ivpu_dbg(vdev, IRQ, "NOC Firewall interrupt detected, counter %d\n",
ivpu_dbg(vdev, IRQ, "MMU sync complete\n");
ivpu_dbg(vdev, IRQ, "MMU sync complete\n");
ivpu_dbg(vdev, IRQ, "MMU event queue\n");
ivpu_dbg(vdev, IRQ, "MMU error\n");
if (!(status & IRQ))
#define ENABLE_IRQ(IRQ, TYPE) irq_set_irq_type(IRQ, TYPE)
#define DISABLE_IRQ(IRQ) irq_set_irq_type(IRQ, IRQ_TYPE_NONE)
irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data);
u8 IRQ = 0;
IRQ = resources->irqs->interrupt[(temp_byte +
IRQ = cpqhp_disk_irq;
IRQ = cpqhp_nic_irq;
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
IRQ##irq_mark##_MARK, \
IRQ##irq##_MARK, \
IRQ##irq##_PORT##pin##_MARK, \
u8 IRQ;
ioctl->data.chaninfo.IRQ = a->pcid->irq;
u32 IRQ)
iowrite32(IRQ, amd_axi_w1_local->base_addr + AXIW1_IRQE_REG);
outb(0x00, ICEMT(ice, IRQ));
outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
unsigned char mtstat = inb(ICEMT(ice, IRQ));
outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
outb(mtstat, ICEMT1724(ice, IRQ));
.irq_en_shift = IRQ##_id##_MCU_ON_SFT, \
.irq_clr_shift = IRQ##_id##_MCU_CLR_SFT, \
IRQ##_id##_MCU_MODE_SFT, \
IRQ##_id##_MCU_MODE_MASK)