arch/arm/mach-imx/mach-imx6q.c

123

regmap_update_bits(gpr, IOMUXC_GPR1,

arch/arm/mach-imx/mach-imx6sl.c

25

regmap_update_bits(gpr, IOMUXC_GPR1,

arch/arm/mach-imx/mach-imx6sl.c

27

regmap_update_bits(gpr, IOMUXC_GPR1,

arch/arm/mach-imx/mach-imx7d.c

44

regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0);

arch/arm/mach-imx/mach-imx7d.c

45

regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0);

arch/arm/mach-imx/pm-imx6.c

620

regmap_update_bits(gpr, IOMUXC_GPR1, IMX6Q_GPR1_GINT,

drivers/bus/imx-weim.c

129

regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);

drivers/clk/imx/clk-imx6q.c

918

IOMUXC_GPR1, enet_ref_sels, ARRAY_SIZE(enet_ref_sels),

drivers/clk/imx/clk-imx6ul.c

491

IOMUXC_GPR1, enet1_ref_sels, ARRAY_SIZE(enet1_ref_sels),

drivers/clk/imx/clk-imx6ul.c

496

IOMUXC_GPR1, enet2_ref_sels, ARRAY_SIZE(enet2_ref_sels),

drivers/pci/controller/dwc/pci-imx6.c

678

regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);

drivers/pci/controller/dwc/pci-imx6.c

686

regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);

drivers/pci/controller/dwc/pci-imx6.c

688

regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);

drivers/pci/controller/dwc/pci-imx6.c

689

regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);

drivers/pci/controller/dwc/pci-imx6.c

796

regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST,

drivers/pci/controller/dwc/pci-imx6.c

809

regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);

drivers/pci/controller/dwc/pci-imx6.c

810

regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);

sound/soc/fsl/fsl_sai.c

1563

regmap_update_bits(gpr, IOMUXC_GPR1, MCLK_DIR(index),