INTERLACE
info->lcd_timing.misc_info.INTERLACE =
info->lcd_timing.misc_info.INTERLACE =
info->lcd_timing.misc_info.INTERLACE = !!(lvds->lcd_timing.miscinfo & ATOM_INTERLACE);
if (bp_params->flags.INTERLACE) {
if (bp_params->flags.INTERLACE) {
if (bp_params->flags.INTERLACE) {
state->optc[i].otg_field_number_cntl = (timing->flags.INTERLACE) ? 1 : 0;
state->optc[i].otg_interlace_enable = timing->flags.INTERLACE ? 1 : 0;
uint32_t INTERLACE :1;
uint32_t INTERLACE :1;
if (hw_crtc_timing.flags.INTERLACE) {
if (timing->flags.INTERLACE == 1)
if (patched_crtc_timing.flags.INTERLACE == 1)
bp_params.flags.INTERLACE = 1;
if (timing->flags.INTERLACE == 1) {
timing->flags.INTERLACE,
uint32_t interlace_factor = timing->flags.INTERLACE ? 2 : 1;
if (hw_crtc_timing.flags.INTERLACE) {
if (hw_crtc_timing.flags.INTERLACE) {
* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);
* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);
if (patched_crtc_timing.flags.INTERLACE == 1) {
pipes[pipe_cnt].pipe.dest.interlaced = (unsigned char)timing->flags.INTERLACE;
timing->interlaced = (stream->timing.flags.INTERLACE != 0);
const unsigned int min_v_front_porch = (stream->timing.flags.INTERLACE != 0) ? 2 : 1;
out->Interlace[location] = (in->timing.flags.INTERLACE != 0);
if (hw_crtc_timing.flags.INTERLACE) {
(stream->timing.flags.INTERLACE != 0);
if (timing->flags.INTERLACE == 1) {
interlace_factor = patched_crtc_timing.flags.INTERLACE ? 2 : 1;
bool interlace = (stream->timing.flags.INTERLACE != 0);
if (patched_crtc_timing.flags.INTERLACE == 1)
if (patched_crtc_timing.flags.INTERLACE == 1)
if (patched_crtc_timing.flags.INTERLACE == 1) {
if (timing->flags.INTERLACE == 1) {
if (timing->flags.INTERLACE == 1)
min_v_blank = timing->flags.INTERLACE?optc1->min_v_blank_interlace:optc1->min_v_blank;
min_v_blank = timing->flags.INTERLACE?optc1->min_v_blank_interlace:optc1->min_v_blank;
uint32_t INTERLACE:1;
uint32_t INTERLACE:1;
fbiinit5 |= INTERLACE;