IMX_MU_xSR_TEn
can_write = status & IMX_MU_xSR_TEn(priv->dcfg->type, idx % 4);
xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr),
val &= IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx) &
if ((val == IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx)) &&