IDLE
CMD_FLAG_NAME(IDLE),
REG_TEST_FLD(VPU_HW_BTRS_MTL_VPU_STATUS, IDLE, val);
REG_TEST_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, IDLE, val);
return REGB_POLL_FLD(VPU_HW_BTRS_MTL_VPU_STATUS, IDLE, 0x1, IDLE_TIMEOUT_US);
return REGB_POLL_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, IDLE, 0x1, IDLE_TIMEOUT_US);
FIELD_GET(HISI_DMA_Q_FSM_STS_MASK, tmp) == IDLE,
cp_wait(ctx, STATUS, IDLE);
cp_wait(ctx, STATUS, IDLE);
cp_wait(ctx, STATUS, IDLE);
cp_wait(ctx, STATUS, IDLE);
ib_cm_state(IDLE) \
case IDLE:
sw->state = IDLE;
case IDLE:
sw->state = IDLE;
case IDLE:
sw->state = IDLE;
case IDLE:
sw->state = IDLE;
return IDLE;
r = policy_get_background_work(cache->policy, b == IDLE, &op);
if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
u8 IDLE :1;
u8 IDLE :1;
case IDLE:
js->jtag_state = IDLE;
if ((state == IDLE) || (state == DRSHIFT) ||
/* RESET */ { RESET, IDLE },
/* IDLE */ { DRSELECT, IDLE },
/* DRUPDATE */ { DRSELECT, IDLE },
/* IRUPDATE */ { DRSELECT, IDLE }
case IDLE:
start_state = IDLE;
case IDLE:
start_state = IDLE;
case IDLE:
start_state = IDLE;
js->drstop_state = IDLE;
js->irstop_state = IDLE;
case IDLE:
start_state = IDLE;
MEI_HBM_STATE(IDLE);
return readx_poll_timeout(MACB_READ_NSR, bp, val, val & MACB_BIT(IDLE),
return IDLE;
return IDLE;
return IDLE;
if (!wait_mask(STATUS(sh->io_port), STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0))
STATMASK, IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0)) {
#define STATMASK (STST | DIAGF | INIT | IDLE | CDF | DF | INVDCMD)
#define CMD_IDLE(cs_sel, cyc) (IDLE | ((cs_sel) << 10) | ((cyc) & IDLE_CYCLE_MASK))