arch/arm/mach-omap1/dma.c

36

[GCR] = { 0x0400, 0x00, OMAP_DMA_REG_16BIT },

arch/arm/mach-omap2/dma.c

37

[GCR] = { 0x0078, 0x00, OMAP_DMA_REG_32BIT },

drivers/dma/ti/omap-dma.c

1580

od->context.gcr = omap_dma_glbl_read(od, GCR);

drivers/dma/ti/omap-dma.c

1587

omap_dma_glbl_write(od, GCR, od->context.gcr);

drivers/dma/ti/omap-dma.c

1643

omap_dma_glbl_write(od, GCR, val);

drivers/gpu/drm/stm/lvds.c

176

u32 GCR; /* Global Control Register */

drivers/gpu/drm/stm/lvds.c

206

.GCR = 0x0,

drivers/gpu/drm/stm/lvds.c

232

.GCR = 0x0,

drivers/gpu/drm/stm/lvds.c

363

lvds_set(lvds, phy->base + phy->ofs.GCR, lvds_gcr);

drivers/gpu/drm/stm/lvds.c

573

lvds_set(lvds, phy->base + phy->ofs.GCR, PHY_GCR_DIV_RSTN | PHY_GCR_RSTZ);

drivers/gpu/drm/stm/lvds.c

587

lvds_set(lvds, phy->base + phy->ofs.GCR, PHY_GCR_DIV_RSTN | PHY_GCR_RSTZ);

drivers/gpu/drm/stm/lvds.c

612

lvds_clear(lvds, lvds->primary->base + lvds->primary->ofs.GCR,

drivers/gpu/drm/stm/lvds.c

616

lvds_clear(lvds, lvds->primary->base + lvds->primary->ofs.GCR,

drivers/gpu/drm/stm/lvds.c

621

lvds_clear(lvds, lvds->secondary->base + lvds->secondary->ofs.GCR,

drivers/gpu/drm/stm/lvds.c

625

lvds_clear(lvds, lvds->secondary->base + lvds->secondary->ofs.GCR,

drivers/net/ethernet/intel/e1000e/82571.c

1114

reg_data = er32(GCR);

drivers/net/ethernet/intel/e1000e/82571.c

1116

ew32(GCR, reg_data);

drivers/net/ethernet/intel/e1000e/82571.c

1246

reg = er32(GCR);

drivers/net/ethernet/intel/e1000e/82571.c

1248

ew32(GCR, reg);

drivers/net/ethernet/intel/e1000e/mac.c

1690

gcr = er32(GCR);

drivers/net/ethernet/intel/e1000e/mac.c

1693

ew32(GCR, gcr);

drivers/net/ethernet/via/via-velocity.c

3081

u8 GCR;

drivers/net/ethernet/via/via-velocity.c

3082

GCR = readb(&regs->CHIPGCR);

drivers/net/ethernet/via/via-velocity.c

3083

GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;

drivers/net/ethernet/via/via-velocity.c

3084

writeb(GCR, &regs->CHIPGCR);

sound/arm/pxa2xx-ac97-lib.c

123

writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

128

writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */

sound/arm/pxa2xx-ac97-lib.c

129

writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */

sound/arm/pxa2xx-ac97-lib.c

133

writel(GCR_COLD_RST, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

145

writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

152

writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */

sound/arm/pxa2xx-ac97-lib.c

153

writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */

sound/arm/pxa2xx-ac97-lib.c

161

writel(GCR_COLD_RST | GCR_WARM_RST, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

171

writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

177

writel(0, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

178

writel(GCR_CLKBPB, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

180

writel(0, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

182

writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */

sound/arm/pxa2xx-ac97-lib.c

183

writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */

sound/arm/pxa2xx-ac97-lib.c

188

writel(readl(ac97_reg_base + GCR) & (~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN)), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

190

writel(GCR_WARM_RST | GCR_COLD_RST, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

271

u32 gcr = readl(ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

274

writel(gcr, ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

306

writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

387

writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);

sound/arm/pxa2xx-ac97-lib.c

403

writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);