FIFO_SIZE
dma_len = min(xfer_cnt, FIFO_SIZE);
FIFO_SIZE - 1024) {
#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
devpriv->fifo_buf = kmalloc_array(FIFO_SIZE,
unsigned int nsamples = comedi_nsamples_left(s, FIFO_SIZE / 2);
size_t tx_fifo_avail = FIFO_SIZE - readl(idev->base + MST_TX_FIFO);
msgs[0].len > 0 && msgs[0].len <= FIFO_SIZE &&
len = (msg->len >= FIFO_SIZE) ? FIFO_SIZE - 1
while (msg->len && (IN32(id, I2CTFDR) < FIFO_SIZE)) {
len = (msg->len >= FIFO_SIZE) ? 2 : 0;
if (id->msg->len >= FIFO_SIZE)
len = FIFO_SIZE - 1; /* trigger at fifo full */
if (id->msg->len >= FIFO_SIZE)
while (id->msg->len && IN32(id, I2CTFDR) < FIFO_SIZE) {
u32 fifo_space = FIFO_SIZE -
return FIFO_SIZE - kfifo_len(&port->xmit_fifo);
if (kfifo_alloc(&port->xmit_fifo, FIFO_SIZE, GFP_KERNEL))
FIFO_SIZE * sizeof(struct rx_desc));
FIFO_SIZE * sizeof(struct tx_desc));
int memsz = FIFO_SIZE * (1 << (sz_type + 1));
u16 memsz = FIFO_SIZE * (1 << fsz_type);
return (FIFO_SIZE * (1 << rx_size)) / sizeof(struct rxf_desc);
return (FIFO_SIZE * (1 << tx_size)) / BDX_TXF_DESC_SZ;
for (i = 0; i < FIFO_SIZE; ++i)
for (i = 0; i < FIFO_SIZE; ++i)
FIFO_SIZE * sizeof(u32));
for (i = 0; i < FIFO_SIZE; i++) {
u32 size = FIFO_SIZE * sizeof(u32);
if (spi_st->words_remaining > FIFO_SIZE)
count = FIFO_SIZE;
if (spi_st->words_remaining > FIFO_SIZE)
count = FIFO_SIZE;
FIFO_SIZE - readw(up->base + RP2_TX_FIFO_COUNT),
p->fifosize = FIFO_SIZE;
u8 fifo_buf[FIFO_SIZE];
_req->length <= FIFO_SIZE) {
to_read = rem <= FIFO_SIZE ? rem : FIFO_SIZE;
ret = kfifo_alloc(&test, FIFO_SIZE, GFP_KERNEL);
static DECLARE_KFIFO(test, unsigned char, FIFO_SIZE);
static const unsigned char expected_result[FIFO_SIZE] = {
if (kfifo_alloc(&fifo, FIFO_SIZE, GFP_KERNEL)) {
nents = kfifo_dma_in_prepare(&fifo, sg, ARRAY_SIZE(sg), FIFO_SIZE);
ret = kfifo_alloc(&test, FIFO_SIZE, GFP_KERNEL);
static DEFINE_KFIFO(test, int, FIFO_SIZE);
static const int expected_result[FIFO_SIZE] = {
ret = kfifo_alloc(&test, FIFO_SIZE, GFP_KERNEL);
typedef STRUCT_KFIFO_REC_1(FIFO_SIZE) mytest;
#define FIFO_MASK (FIFO_SIZE-1) //0x1f /* at shift left 0xc */
#define FIFO_MASK (FIFO_SIZE-1) //0x1f /* at shift left 0xc */
#define FIFO_MASK (FIFO_SIZE-1) //0x3f /* at shift left 0xc */
vortex_fifo_clearadbdata(vortex, x, FIFO_SIZE);
vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE);
vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE);
vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE); // this_4
vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE);
vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE); // this_4
vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
writel(FIFO_SIZE, chip->base + reg_fifo_size);
writel(FIFO_SIZE, chip->base + reg_fifo_size);
rv_writel(FIFO_SIZE, rtd->acp3x_base + reg_fifo_size);
acp_writel(FIFO_SIZE, rtd->acp5x_base + reg_fifo_size);