EXTRACT
source = EXTRACT(c_stat, EV6__C_STAT__SOURCE);
stream = EXTRACT(c_stat, EV6__C_STAT__ISTREAM);
bits = EXTRACT(c_stat, EV6__C_STAT__DOUBLE);
packet_desc[EXTRACT(err_cyc, IO7__ERR_CYC__PACKET)],
EXTRACT(err_cyc, IO7__ERR_CYC__CYCLE),
err_print_prefix, EXTRACT(crrct_sym, IO7__PO7_CRRCT_SYM__SYN));
marvel_print_err_cyc(EXTRACT(crrct_sym, IO7__PO7_CRRCT_SYM__ERR_CYC));
if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__SYN))
EXTRACT(uncrr_sym, IO7__PO7_UNCRR_SYM__SYN));
if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__ERR_CYC))
marvel_print_err_cyc(EXTRACT(uncrr_sym,
scratch = EXTRACT(uncrr_sym, IO7__PO7_UNCRR_SYM__CLK);
if ((scratch = EXTRACT(uncrr_sym, IO7__PO7_UNCRR_SYM__VICTIM_SP))) {
if ((scratch = EXTRACT(uncrr_sym, IO7__PO7_UNCRR_SYM__DETECT_SP))) {
if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__STRV_VTR)) {
scratch = EXTRACT(uncrr_sym, IO7__PO7_UNCRR_SYM__STRV_VTR);
EXTRACT(scratch, IO7__STRV_VTR__MSI__INTNUM));
'A' + EXTRACT(scratch,
EXTRACT(scratch, IO7__STRV_VTR__LSI__BUS),
EXTRACT(scratch, IO7__STRV_VTR__LSI__SLOT));
switch(EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_OPCODE)) {
EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_OPCODE));
EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_SRC_PORT),
EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_DEST_PID),
if (0xC5 != EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_OPCODE))
EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_PKT_OFF));
EXTRACT(tlb_err, IO7__POX_TLBERR__ERR_TLB_PTR),
tlb_errors[EXTRACT(tlb_err, IO7__POX_TLBERR__ERRCODE)],
EXTRACT(tlb_err, IO7__POX_TLBERR__FADDR) << 6);
EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_BUS),
EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_DEV),
EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_FUNC));
switch(EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__MSG_CLASSINDEX)) {
EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__MESSAGE));
EXTRACT(trans_sum, IO7__POX_TRANSUM__PCIX_CMD),
pcix_cmd[EXTRACT(trans_sum, IO7__POX_TRANSUM__PCIX_CMD)],
EXTRACT(trans_sum, IO7__POX_TRANSUM__PCI_ADDR),
EXTRACT(trans_sum, IO7__POX_TRANSUM__PCIX_MASTER_SLOT));
unsigned int upe_error = EXTRACT(err_sum,
serror_src[EXTRACT(serror, TITAN__PCHIP_SERROR__SRC)],
serror_cmd[EXTRACT(serror, TITAN__PCHIP_SERROR__CMD)],
(unsigned)EXTRACT(serror, TITAN__PCHIP_SERROR__SYN),
EXTRACT(serror, TITAN__PCHIP_SERROR__ADDR));
cmd = EXTRACT(perror, TITAN__PCHIP_PERROR__CMD);
addr = EXTRACT(perror, TITAN__PCHIP_PERROR__ADDR) << 2;
cmd = EXTRACT(agperror, TITAN__PCHIP_AGPERROR__CMD);
addr = EXTRACT(agperror, TITAN__PCHIP_AGPERROR__ADDR) << 3;
len = EXTRACT(agperror, TITAN__PCHIP_AGPERROR__LEN);
nxs = EXTRACT(c_misc, TITAN__CCHIP_MISC__NXS);
if (EXTRACT(val, FIXED_BASE))
clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;
clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * EXTRACT(val, CX_UNKNOWN);
clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);
if (EXTRACT(val, FIXED_BASE))
clk->base_clock = (300 - 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;
clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;
clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);
n = EXTRACT(cmd, VIV_FE_LOAD_STATE_HEADER_COUNT);
off = EXTRACT(cmd, VIV_FE_LOAD_STATE_HEADER_OFFSET);
n = EXTRACT(cmd, VIV_FE_DRAW_2D_HEADER_COUNT);
if (chan->address == EXTRACT(ret, 12, 4))
*val = EXTRACT(ret, chan->scan_type.shift,