arch/powerpc/include/asm/book3s/64/mmu-hash.h

862

(((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)

arch/powerpc/kvm/book3s_32_mmu_host.c

112

page = (eaddr & ~ESID_MASK) >> 12;

arch/powerpc/kvm/book3s_32_mmu_host.c

167

((eaddr & ~ESID_MASK) >> VPN_SHIFT);

arch/powerpc/kvm/book3s_64_mmu.c

405

slbe->orige = rb & (ESID_MASK | SLB_ESID_V);

arch/powerpc/kvm/book3s_64_mmu_host.c

283

else if ((svcpu->slb[i].esid & ESID_MASK) == esid) {

arch/powerpc/kvm/book3s_64_mmu_host.c

316

u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;

arch/powerpc/kvm/book3s_64_mmu_host.c

323

slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);

arch/powerpc/kvm/book3s_64_mmu_hv.c

324

mask = ESID_MASK;

arch/powerpc/mm/copro_fault.c

130

slb->esid = (ea & (ssize == MMU_SEGSIZE_1T ? ESID_MASK_1T : ESID_MASK)) | SLB_ESID_V;

arch/powerpc/platforms/cell/spu_base.c

219

slb->esid = (ea & ESID_MASK) | SLB_ESID_V;

arch/powerpc/platforms/cell/spu_base.c

233

if (!((slbs[i].esid ^ ea) & ESID_MASK))