drivers/gpu/drm/msm/dsi/dsi_cfg.h

50

const resource_size_t io_start[VARIANTS_MAX][DSI_MAX];

drivers/gpu/drm/msm/dsi/dsi_host.c

1953

for (j = 0; j < DSI_MAX; j++)

drivers/gpu/drm/msm/dsi/dsi_manager.c

137

struct msm_dsi_phy_shared_timings shared_timings[DSI_MAX])

drivers/gpu/drm/msm/dsi/dsi_manager.c

217

struct msm_dsi_phy_shared_timings phy_shared_timings[DSI_MAX];

drivers/gpu/drm/msm/dsi/dsi_manager.c

24

struct msm_dsi *dsi[DSI_MAX];

drivers/gpu/drm/msm/dsi/dsi_manager.c

44

return msm_dsim_glb.dsi[(id + 1) % DSI_MAX];

drivers/gpu/drm/msm/dsi/dsi_manager.c

564

if (id >= DSI_MAX) {

drivers/gpu/drm/msm/dsi/phy/dsi_phy.h

35

const resource_size_t io_start[DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

103

static struct dsi_pll_10nm *pll_10nm_list[DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

540

pll_10nm->slave = pll_10nm_list[(pll_10nm->phy->id + 1) % DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

109

static struct dsi_pll_14nm *pll_14nm_list[DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

750

pll_14nm->slave = pll_14nm_list[(pll_14nm->phy->id + 1) % DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

111

static struct dsi_pll_7nm *pll_7nm_list[DSI_MAX];

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

700

pll_7nm->slave = pll_7nm_list[(pll_7nm->phy->id + 1) % DSI_MAX];