drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h

53

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h

53

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h

53

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h

26

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h

69

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

27

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

69

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

26

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

64

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

26

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

63

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

27

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

72

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

15

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

31

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

39

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

27

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

75

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

27

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

75

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

27

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

72

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

24

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

69

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

26

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

69

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

25

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

74

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

55

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h

44

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

25

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

62

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h

23

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h

44

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h

24

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h

45

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

25

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

74

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

24

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

60

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

25

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

73

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

25

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

74

.clk_ctrl = DPU_CLK_CTRL_VIG0,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

24

[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

73

.clk_ctrl = DPU_CLK_CTRL_VIG0,