drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

117

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

33

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

30

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

96

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

29

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

87

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

120

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

33

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

19

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

63

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

123

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

33

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

123

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

33

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

104

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

31

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

27

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

93

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

122

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

31

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

26

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

79

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

28

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

86

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

122

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

31

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

27

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

84

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

121

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

31

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

122

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

31

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

121

.clk_ctrl = DPU_CLK_CTRL_DMA2,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

30

[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },