drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h

141

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h

35

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

109

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

32

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

29

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

88

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

28

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

79

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

112

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

32

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

18

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h

55

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

115

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

32

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

115

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

32

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

30

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h

96

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

26

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h

85

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

28

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

85

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

114

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

30

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

25

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

71

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

27

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h

78

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

114

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

30

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

26

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

76

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

113

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h

30

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

114

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

30

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

113

.clk_ctrl = DPU_CLK_CTRL_DMA1,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

29

[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },