DPU_CLK_CTRL_DMA0
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
.clk_ctrl = DPU_CLK_CTRL_DMA0,
[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },