DMA_SLAVE_BUSWIDTH_8_BYTES
if (config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
if ((config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
|| (config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES))
DMA_SLAVE_BUSWIDTH_8_BYTES | \
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
fsl_edma->dma_dev.src_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
fsl_edma->dma_dev.dst_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES) | \
case DMA_SLAVE_BUSWIDTH_8_BYTES:
case DMA_SLAVE_BUSWIDTH_8_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
case DMA_SLAVE_BUSWIDTH_8_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
if (config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)
gpi_dev->dma_device.src_addr_widths = DMA_SLAVE_BUSWIDTH_8_BYTES;
gpi_dev->dma_device.dst_addr_widths = DMA_SLAVE_BUSWIDTH_8_BYTES;
DMA_SLAVE_BUSWIDTH_4_BYTES | DMA_SLAVE_BUSWIDTH_8_BYTES |
DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |
DMA_SLAVE_BUSWIDTH_8_BYTES,
DMA_SLAVE_BUSWIDTH_4_BYTES | DMA_SLAVE_BUSWIDTH_8_BYTES |
case DMA_SLAVE_BUSWIDTH_8_BYTES:
case DMA_SLAVE_BUSWIDTH_8_BYTES:
case DMA_SLAVE_BUSWIDTH_8_BYTES:
src_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES ||
dst_addr_width > DMA_SLAVE_BUSWIDTH_8_BYTES ||
else if (width == DMA_SLAVE_BUSWIDTH_8_BYTES)
caps->src_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
caps->dst_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
if (caps->max_burst < DMA_SLAVE_BUSWIDTH_8_BYTES) {
caps->src_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
caps->dst_addr_widths &= ~BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
(maxburst) < DMA_SLAVE_BUSWIDTH_8_BYTES) ? \
DMA_SLAVE_BUSWIDTH_4_BYTES : DMA_SLAVE_BUSWIDTH_8_BYTES)
if (sdw == DMA_SLAVE_BUSWIDTH_8_BYTES && port_is_ahb(ddata->ports_max_dw[sap]))
if (ddw == DMA_SLAVE_BUSWIDTH_8_BYTES && port_is_ahb(ddata->ports_max_dw[dap]))
if ((port_is_ahb(sap_max_dw) && sdw == DMA_SLAVE_BUSWIDTH_8_BYTES) ||
(port_is_ahb(dap_max_dw) && ddw == DMA_SLAVE_BUSWIDTH_8_BYTES)) {
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
case DMA_SLAVE_BUSWIDTH_8_BYTES:
enum dma_slave_buswidth max_width = DMA_SLAVE_BUSWIDTH_8_BYTES;
for (max_width = DMA_SLAVE_BUSWIDTH_8_BYTES;
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
case DMA_SLAVE_BUSWIDTH_8_BYTES:
if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
case DMA_SLAVE_BUSWIDTH_8_BYTES:
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES;
BIT(DMA_SLAVE_BUSWIDTH_8_BYTES))
buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES;
buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES;
hw.period_bytes_min = dma_data->maxburst * DMA_SLAVE_BUSWIDTH_8_BYTES;