Symbol: DF
arch/m68k/kernel/traps.c
384
if (ssw & DF)
arch/m68k/kernel/traps.c
396
if ((ssw & DF)
arch/m68k/kernel/traps.c
405
if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
arch/m68k/kernel/traps.c
413
if (ssw & DF) {
arch/m68k/kernel/traps.c
434
if (!(ssw & (FC | FB)) && !(ssw & DF))
arch/m68k/kernel/traps.c
441
if (ssw & DF) {
arch/m68k/kernel/traps.c
515
if (ssw & DF)
arch/m68k/kernel/traps.c
525
if (ssw & DF) {
arch/m68k/kernel/traps.c
632
if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
arch/m68k/kernel/traps.c
992
if (ssw & DF)
arch/x86/kernel/cpu/common.c
2376
tss->x86_tss.ist[IST_INDEX_DF] = __this_cpu_ist_top_va(DF);
arch/x86/kernel/dumpstack_64.c
86
EPAGERANGE(DF),
arch/x86/kernel/fred.c
92
wrmsrq(MSR_IA32_FRED_RSP3, __this_cpu_ist_top_va(DF));
arch/x86/kvm/trace.h
464
EXS(DF), EXS(TS), EXS(NP), EXS(SS), EXS(GP), EXS(PF), EXS(MF), \
arch/x86/mm/cpu_entry_area.c
154
cea_map_stack(DF);
arch/x86/mm/fault.c
674
call_on_stack(__this_cpu_ist_top_va(DF) - sizeof(void*),
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
109
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
117
WREG32_FIELD15(DF, 0, DF_CS_AON0_CoherentSlaveModeCtrlA0,
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
49
tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
51
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
53
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
61
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
88
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
91
WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
93
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
drivers/gpu/drm/amd/amdgpu/df_v1_7.c
96
WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
227
tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DfGlobalCtrl);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
268
tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
270
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
272
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
281
tmp = RREG32_SOC15(DF, 0, mmDF_GCM_AON0_DramMegaBaseAddress0);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
285
tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DramBaseAddress0);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
314
tmp = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
318
WREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
321
tmp = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
325
WREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
340
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
645
hw_assert_msklo = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v3_6.c
647
hw_assert_mskhi = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v4_15.c
37
tmp = RREG32_SOC15(DF, 0, regNCSConfigurationRegister1);
drivers/gpu/drm/amd/amdgpu/df_v4_15.c
39
WREG32_SOC15(DF, 0, regNCSConfigurationRegister1, tmp);
drivers/gpu/drm/amd/amdgpu/df_v4_3.c
34
hw_assert_msklo = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/amdgpu/df_v4_3.c
36
hw_assert_mskhi = RREG32_SOC15(DF, 0,
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
943
data->mem_channels = (RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0) &
drivers/scsi/aha1542.c
133
if (!wait_mask(STATUS(base), DF, DF, 0, timeout))
drivers/scsi/aha1542.c
225
if (!wait_mask(STATUS(sh->io_port), STATMASK, INIT | IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0))
drivers/scsi/aha1542.c
240
if (!wait_mask(STATUS(sh->io_port), DF, DF, 0, 0))
drivers/scsi/aha1542.c
246
if (inb(STATUS(sh->io_port)) & DF)
drivers/scsi/aha1542.c
551
if (i & DF) {
drivers/scsi/aha1542.c
656
if (i & DF) {
drivers/scsi/aha1542.c
941
STATMASK, IDLE, STST | DIAGF | INVDCMD | DF | CDF, 0)) {
drivers/scsi/aha1542.h
18
#define STATMASK (STST | DIAGF | INIT | IDLE | CDF | DF | INVDCMD)
include/net/ip.h
199
bool DF;
include/net/ip.h
210
unsigned int mtu, bool DF, struct ip_frag_state *state);
net/ipv4/ip_output.c
644
unsigned int ll_rs, unsigned int mtu, bool DF,
net/ipv4/ip_output.c
649
state->DF = DF;
net/ipv4/ip_output.c
734
if (state->DF)
tools/testing/selftests/kvm/lib/x86/processor.c
43
VEC_STR(DF);