drivers/gpu/drm/i915/display/intel_display.h

86

for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \

drivers/gpu/drm/i915/display/intel_display_device.c

1129

.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \

drivers/gpu/drm/i915/display/intel_display_device.c

1307

.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \

drivers/gpu/drm/i915/display/intel_display_device.c

663

.dbuf.slice_mask = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/intel_display_device.c

813

.dbuf.slice_mask = BIT(DBUF_S1), \

drivers/gpu/drm/i915/display/intel_display_device.c

872

.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \

drivers/gpu/drm/i915/display/intel_display_device.c

962

.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \

drivers/gpu/drm/i915/display/intel_display_power.c

1123

slices_mask = BIT(DBUF_S1) | display->dbuf.enabled_slices;

drivers/gpu/drm/i915/display/skl_watermark.c

1014

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1022

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1030

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

1047

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4),

drivers/gpu/drm/i915/display/skl_watermark.c

1054

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4),

drivers/gpu/drm/i915/display/skl_watermark.c

1061

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1075

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1088

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1102

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1110

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1116

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1117

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1124

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1130

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1132

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1139

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1145

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1147

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1155

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1161

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1164

[PIPE_D] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

1259

return active_pipes & BIT(pipe) ? BIT(DBUF_S1) : 0;

drivers/gpu/drm/i915/display/skl_watermark.c

2482

enabled_slices = BIT(DBUF_S1);

drivers/gpu/drm/i915/display/skl_watermark.c

432

if (slice_mask & (BIT(DBUF_S1) | BIT(DBUF_S2)))

drivers/gpu/drm/i915/display/skl_watermark.c

433

slice_mask = BIT(DBUF_S1);

drivers/gpu/drm/i915/display/skl_watermark.c

758

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

764

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

770

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

783

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

790

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

797

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

798

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

821

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

827

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

834

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

840

[PIPE_C] = BIT(DBUF_S2) | BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

846

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

853

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

860

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

861

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

868

[PIPE_D] = BIT(DBUF_S2) | BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

874

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

881

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

888

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

889

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

896

[PIPE_C] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

903

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

911

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

919

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

920

[PIPE_B] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

932

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

938

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

944

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

957

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

964

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

971

[PIPE_A] = BIT(DBUF_S1),

drivers/gpu/drm/i915/display/skl_watermark.c

985

[PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

992

[PIPE_B] = BIT(DBUF_S1) | BIT(DBUF_S2),

drivers/gpu/drm/i915/display/skl_watermark.c

999

[PIPE_A] = BIT(DBUF_S1),