D13
ASPEED_PINCTRL_PIN(D13),
SSSF_PIN_DECL(D13, GPIOG2, SGPSI0, SIG_DESC_SET(SCU84, 2));
ASPEED_PINCTRL_PIN(D13),
SIG_EXPR_LIST_DECL_SINGLE(D13, SPI1CS1, SPI1CS1, SIG_DESC_SET(SCU80, 15));
SIG_EXPR_LIST_DECL_SINGLE(D13, TIMER3, TIMER3, SIG_DESC_SET(SCU80, 2));
PIN_DECL_2(D13, GPIOA2, SPI1CS1, TIMER3);
FUNC_GROUP_DECL(SPI1CS1, D13);
FUNC_GROUP_DECL(TIMER3, D13);
ASPEED_PINCTRL_PIN(D13),
ASPEED_PULL_DOWN_PINCONF(D13, SCU61C, 7),
SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
PINMUX_IPSR_GPSR(IP2_31_28, D13),
PIN_NOGP_CFG(D13, "D13", fn, SH_PFC_PIN_CFG_PULL_UP), \
PINMUX_IPSR_GPSR(IP1_17_15, D13),
PINMUX_IPSR_GPSR(IP0_13, D13),
PINMUX_SINGLE(D13),
PINMUX_IPSR_GPSR(IP1_17_15, D13),
PINMUX_IPSR_GPSR(IP7_3_0, D13),
#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_13 F_(D13, IP7_3_0)
PINMUX_IPSR_GPSR(IP7_3_0, D13),
#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_13 F_(D13, IP7_3_0)
PINMUX_IPSR_GPSR(IP7_3_0, D13),
#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_13 F_(D13, IP7_3_0)
#define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_27_24, D13),
#define IP6_27_24 FM(VI1_DATA10) FM(TCLK2_A) F_(0, 0) FM(D13) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_27_24, D13),
#define IP7_11_8 FM(D13) FM(CANFD0_RX) FM(RX4_B) FM(CAN0_RX) FM(VI5_DATA9_A) FM(SCL7_B) F_(0, 0) FM(VI5_DATA4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_13 F_(D13, IP7_11_8)
PINMUX_IPSR_GPSR(IP7_11_8, D13),
PINMUX_IPSR_MSEL(IP1SR2_19_16, D13, SEL_I2C5_0),
#define IP1SR2_19_16 FM(GP2_12) FM(TCLK4) FM(MSIOF5_SCK) F_(0, 0) F_(0, 0) FM(D13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
GPIO_FN(D13),
GPIO_FN(D13),
GPIO_FN(D13),
GPIO_FN(D13), GPIO_FN(RX2_B), GPIO_FN(FRB_A), GPIO_FN(ET0_ETXD6_B),
PINMUX_IPSR_GPSR(IP2_27_25, D13),
GPIO_FN(D13),