drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h

19

static inline struct xe_mmio *__compat_uncore_to_mmio(struct intel_uncore *uncore)

drivers/gpu/drm/xe/xe_debugfs.c

167

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_debugfs.c

195

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_debugfs.c

44

static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_device.c

632

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_device.h

112

static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)

drivers/gpu/drm/xe/xe_execlist.c

47

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gsc.c

609

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_idle.c

107

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_mcr.c

300

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_mcr.c

734

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf.c

166

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

377

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

400

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_topology.c

145

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_types.h

176

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_guc.c

1004

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

1078

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

1484

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

966

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc_tlb_inval.c

81

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_hw_error.c

188

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_hw_error.c

272

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_hw_error.c

345

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_hw_error.c

375

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_hwmon.c

1009

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

1085

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

1301

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

1474

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

346

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_hwmon.c

387

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

463

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

507

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

551

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

604

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

709

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

922

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

932

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_i2c.c

182

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

198

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

209

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

285

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

296

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

56

static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)

drivers/gpu/drm/xe/xe_i2c.h

17

struct xe_mmio;

drivers/gpu/drm/xe/xe_i2c.h

47

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_irq.c

100

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

116

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

131

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

142

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_irq.c

274

struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_irq.c

358

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

43

static void assert_iir_is_zero(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_irq.c

445

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

463

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

496

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

543

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

622

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

65

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

83

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_mmio.c

122

void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size)

drivers/gpu/drm/xe/xe_mmio.c

131

static void mmio_flush_pending_writes(struct xe_mmio *mmio)

drivers/gpu/drm/xe/xe_mmio.c

144

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

157

void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val)

drivers/gpu/drm/xe/xe_mmio.c

166

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

179

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)

drivers/gpu/drm/xe/xe_mmio.c

192

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

210

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set)

drivers/gpu/drm/xe/xe_mmio.c

221

int xe_mmio_write32_and_verify(struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_mmio.c

232

bool xe_mmio_in_range(const struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_mmio.c

263

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

291

static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

drivers/gpu/drm/xe/xe_mmio.c

363

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

drivers/gpu/drm/xe/xe_mmio.c

382

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

drivers/gpu/drm/xe/xe_mmio.c

400

void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid)

drivers/gpu/drm/xe/xe_mmio.h

17

void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size);

drivers/gpu/drm/xe/xe_mmio.h

19

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

20

void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val);

drivers/gpu/drm/xe/xe_mmio.h

21

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

22

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);

drivers/gpu/drm/xe/xe_mmio.h

23

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

24

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);

drivers/gpu/drm/xe/xe_mmio.h

25

int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);

drivers/gpu/drm/xe/xe_mmio.h

26

bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

28

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

29

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

drivers/gpu/drm/xe/xe_mmio.h

31

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,

drivers/gpu/drm/xe/xe_mmio.h

34

static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)

drivers/gpu/drm/xe/xe_mmio.h

42

void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid);

drivers/gpu/drm/xe/xe_nvm.c

46

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_nvm.c

60

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_oa.c

1105

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

427

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

512

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

843

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_pci.c

598

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_pci.c

814

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_pcode.c

74

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_query.c

96

struct xe_mmio *mmio = &hwe->gt->mmio;

drivers/gpu/drm/xe/xe_survivability_mode.c

130

static void set_survivability_info(struct xe_mmio *mmio, u32 *info, int id)

drivers/gpu/drm/xe/xe_survivability_mode.c

139

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_survivability_mode.c

372

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_sysctrl_types.h

13

struct xe_mmio;

drivers/gpu/drm/xe/xe_sysctrl_types.h

24

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_tile_types.h

64

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_trace.h

376

TP_PROTO(struct xe_mmio *mmio, bool write, u32 reg, u64 val, int len),

drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c

68

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_uc_fw.c

868

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_wa.c

1022

struct xe_mmio *mmio = &tile->mmio;