wss_outb
wss_outb(chip, CS4231P(STATUS), 0);
wss_outb(chip, CS4231P(STATUS), 0);
wss_outb(chip, CS4231P(STATUS), 0);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wss_outb(chip, CS4231P(REG), value);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wss_outb(chip, CS4231P(REG), value);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
wss_outb(chip, CS4231P(REG),
wss_outb(chip, CS4231P(REG), val);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
wss_outb(chip, CS4231P(REG),
wss_outb(chip, CS4231P(REGSEL),
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */