arch/m68k/include/asm/mac_via.h

260

extern void via_l2_flush(int writeback);

arch/m68k/mac/via.c

295

void via_l2_flush(int writeback)

arch/x86/kvm/emulate.c

5429

goto writeback;

arch/x86/kvm/emulate.c

5499

writeback:

arch/x86/kvm/emulate.c

5502

rc = writeback(ctxt, &ctxt->src);

arch/x86/kvm/emulate.c

5507

rc = writeback(ctxt, &ctxt->dst);

arch/x86/kvm/emulate.c

5620

goto writeback;

arch/x86/kvm/x86.c

4699

int writeback)

arch/x86/kvm/x86.c

4723

if (writeback && copy_to_user(user_msrs->entries, entries, size))

arch/x86/kvm/x86.c

9421

bool writeback = true;

arch/x86/kvm/x86.c

9510

goto writeback;

arch/x86/kvm/x86.c

9582

writeback = false;

arch/x86/kvm/x86.c

9590

writeback = false;

arch/x86/kvm/x86.c

9594

writeback = false;

arch/x86/kvm/x86.c

9601

writeback:

arch/x86/kvm/x86.c

9602

if (writeback) {

drivers/block/virtio_blk.c

1070

u8 writeback;

drivers/block/virtio_blk.c

1075

&writeback);

drivers/block/virtio_blk.c

1082

writeback = virtio_has_feature(vdev, VIRTIO_BLK_F_FLUSH);

drivers/block/virtio_blk.c

1084

return writeback;

drivers/block/virtio_blk.c

1124

u8 writeback = virtblk_get_cache_mode(vblk->vdev);

drivers/block/virtio_blk.c

1126

BUG_ON(writeback >= ARRAY_SIZE(virtblk_cache_types));

drivers/block/virtio_blk.c

1127

return sysfs_emit(buf, "%s\n", virtblk_cache_types[writeback]);

drivers/block/zram/zram_drv.c

2995

static DEVICE_ATTR_WO(writeback);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5541

bool writeback = flags & AMDGPU_FENCE_FLAG_TC_WB_ONLY;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5548

if (writeback) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2875

bool writeback = flags & AMDGPU_FENCE_FLAG_TC_WB_ONLY;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2879

amdgpu_ring_write(ring, ((writeback ? (EOP_TC_WB_ACTION_EN |

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6690

CalculateWatermarks_params->WritebackEnable = mode_lib->ms.cache_display_cfg.writeback.WritebackEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6691

CalculateWatermarks_params->WritebackPixelFormat = mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6692

CalculateWatermarks_params->WritebackDestinationWidth = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6693

CalculateWatermarks_params->WritebackDestinationHeight = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6694

CalculateWatermarks_params->WritebackSourceHeight = mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6897

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6898

&& mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k] == dml_444_64) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6899

mode_lib->ms.WriteBandwidth[k] = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6900

* mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6901

/ (mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6904

} else if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6905

mode_lib->ms.WriteBandwidth[k] = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6906

* mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6907

/ (mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6918

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true &&

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6927

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6940

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6941

if (mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k] > mode_lib->ms.ip.writeback_max_hscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6942

|| mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k] > mode_lib->ms.ip.writeback_max_vscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6943

|| mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k] < mode_lib->ms.ip.writeback_min_hscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6944

|| mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k] < mode_lib->ms.ip.writeback_min_vscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6945

|| mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] > (dml_uint_t) mode_lib->ms.ip.writeback_max_hscl_taps

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6946

|| mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k] > (dml_uint_t) mode_lib->ms.ip.writeback_max_vscl_taps

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6947

|| mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k] > (dml_uint_t) mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6948

|| mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k] > (dml_uint_t) mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k]

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6949

|| (mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] > 2.0 && ((mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] % 2) == 1))) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

6952

if (2.0 * mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k] * (mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k] - 1) * 57 > mode_lib->ms.ip.writeback_line_buffer_buffer_size) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7274

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k]) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7276

CalculateWriteBackDISPCLK(mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7278

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7279

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7280

mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7281

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7282

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7283

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7855

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7857

mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7858

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7859

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7860

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7861

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7862

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7863

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7869

if (mode_lib->ms.cache_display_cfg.plane.BlendingAndTiming[m] == k && mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[m] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7872

mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7873

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7874

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7875

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7876

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7877

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

7878

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[m],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8349

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k]) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8354

mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8356

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8357

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8358

mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8359

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8360

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8361

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8835

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8839

mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8840

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8841

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8842

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8843

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8844

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8845

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8851

&& mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[j] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8857

mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8858

mode_lib->ms.cache_display_cfg.writeback.WritebackHRatio[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8859

mode_lib->ms.cache_display_cfg.writeback.WritebackVRatio[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8860

mode_lib->ms.cache_display_cfg.writeback.WritebackVTaps[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8861

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8862

mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

8863

mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[j],

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9463

CalculateWatermarks_params->WritebackEnable = mode_lib->ms.cache_display_cfg.writeback.WritebackEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9464

CalculateWatermarks_params->WritebackPixelFormat = mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9465

CalculateWatermarks_params->WritebackDestinationWidth = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9466

CalculateWatermarks_params->WritebackDestinationHeight = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9467

CalculateWatermarks_params->WritebackSourceHeight = mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9492

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9747

if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true && mode_lib->ms.cache_display_cfg.writeback.WritebackPixelFormat[k] == dml_444_32) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9748

s->WRBandwidth = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k] * mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k] /

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9749

(mode_lib->ms.cache_display_cfg.timing.HTotal[k] * mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * 4;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9750

} else if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9751

s->WRBandwidth = mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationWidth[k] * mode_lib->ms.cache_display_cfg.writeback.WritebackDestinationHeight[k] /

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9752

(mode_lib->ms.cache_display_cfg.timing.HTotal[k] * mode_lib->ms.cache_display_cfg.writeback.WritebackSourceHeight[k] / mode_lib->ms.cache_display_cfg.timing.PixelClock[k]) * 8;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9822

CalculateStutterEfficiency_params->WritebackEnable = mode_lib->ms.cache_display_cfg.writeback.WritebackEnable;

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.c

9894

mode_lib->ms.cache_display_cfg.writeback.WritebackEnable,

drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core_structs.h

681

struct dml_writeback_cfg_st writeback;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn4_soc_bb.h

174

.writeback = {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn4_soc_bb.h

48

.writeback = {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h

428

struct dml2_writeback_cfg writeback;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h

80

} writeback;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10292

if (p->display_cfg->stream_descriptors[k].writeback.active_writebacks_per_stream > 0)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10993

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10995

mode_lib->soc.qos_parameters.writeback.base_latency_us

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10997

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10998

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

10999

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11000

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11001

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11002

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11003

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11697

s->mmSOCParameters.WritebackLatency = mode_lib->soc.qos_parameters.writeback.base_latency_us;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11758

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11946

if (display_cfg->stream_descriptors[k].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11947

s->WRBandwidth = display_cfg->stream_descriptors[k].writeback.writeback_stream[0].output_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11948

* display_cfg->stream_descriptors[k].writeback.writeback_stream[0].output_width /

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11949

(display_cfg->stream_descriptors[k].timing.h_total * display_cfg->stream_descriptors[k].writeback.writeback_stream[0].input_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

11951

* (display_cfg->stream_descriptors[k].writeback.writeback_stream[0].pixel_format == dml2_444_32 ? 4.0 : 8.0);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6735

if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6847

if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6849

/ ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6850

* (double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6851

/ ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height * (double)h_total / pixel_clock_mhz) * 4.0);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

6852

if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format == dml2_444_64) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

7882

s->mSOCParameters.WritebackLatency = mode_lib->soc.qos_parameters.writeback.base_latency_us;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8116

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0 && display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format == dml2_444_64) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8117

mode_lib->ms.WriteBandwidth[k][0] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8118

* display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8119

/ (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8122

} else if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8123

mode_lib->ms.WriteBandwidth[k][0] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8124

* display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8125

/ (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8136

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0 &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8137

(mode_lib->ms.WriteBandwidth[k][0] > mode_lib->ip.writeback_interface_buffer_size_kbytes * 1024 / ((double)mode_lib->soc.qos_parameters.writeback.base_latency_us))) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8146

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8147

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio > mode_lib->ip.writeback_max_hscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8148

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio > mode_lib->ip.writeback_max_vscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8149

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio < mode_lib->ip.writeback_min_hscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8150

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio < mode_lib->ip.writeback_min_vscl_ratio

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8151

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps > (unsigned int) mode_lib->ip.writeback_max_hscl_taps

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8152

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps > (unsigned int) mode_lib->ip.writeback_max_vscl_taps

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8153

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8154

|| display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8155

|| (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps > 2.0 && ((display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps % 2) == 1))) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8158

if (2.0 * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height * (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps - 1) * 57 > mode_lib->ip.writeback_line_buffer_buffer_size) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8601

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8603

CalculateWriteBackDISPCLK(display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8605

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8606

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8607

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8608

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8609

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8610

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

8642

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9194

if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9195

mode_lib->ms.WritebackDelayTime[k] = mode_lib->soc.qos_parameters.writeback.base_latency_us + CalculateWriteBackDelay(

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9196

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9197

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9198

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9199

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9200

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9201

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

9202

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1339

populate_dml_writeback_cfg_from_stream_state(&dml_dispcfg->writeback,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

75

struct drm_writeback_connector writeback;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

79

#define wb_to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, writeback)

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

110

rcar_du_writeback_setup(crtc, &cfg.writeback);

drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c

203

struct drm_writeback_connector *wb_conn = &rcrtc->writeback;

drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c

225

state = rcrtc->writeback.base.state;

drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c

240

drm_writeback_queue_job(&rcrtc->writeback, state);

drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c

245

drm_writeback_signal_completion(&rcrtc->writeback, 0);

drivers/gpu/drm/ttm/ttm_backup.c

115

if (writeback && !folio_mapped(to_folio) &&

drivers/gpu/drm/ttm/ttm_backup.c

97

bool writeback, pgoff_t idx, gfp_t page_gfp,

drivers/gpu/drm/ttm/ttm_bo_util.c

1123

.writeback = flags.writeback});

drivers/gpu/drm/ttm/ttm_pool.c

1050

shandle = ttm_backup_backup_page(backup, page, flags->writeback, i,

drivers/gpu/drm/vkms/vkms_config.h

358

return crtc_cfg->writeback;

drivers/gpu/drm/vkms/vkms_config.h

368

bool writeback)

drivers/gpu/drm/vkms/vkms_config.h

370

crtc_cfg->writeback = writeback;

drivers/gpu/drm/vkms/vkms_config.h

73

bool writeback;

drivers/gpu/drm/vkms/vkms_configfs.c

140

bool writeback;

drivers/gpu/drm/vkms/vkms_configfs.c

145

writeback = vkms_config_crtc_get_writeback(crtc->config);

drivers/gpu/drm/vkms/vkms_configfs.c

147

return sprintf(page, "%d\n", writeback);

drivers/gpu/drm/vkms/vkms_configfs.c

154

bool writeback;

drivers/gpu/drm/vkms/vkms_configfs.c

158

if (kstrtobool(page, &writeback))

drivers/gpu/drm/vkms/vkms_configfs.c

165

vkms_config_crtc_set_writeback(crtc->config, writeback);

drivers/gpu/drm/vkms/vkms_configfs.c

171

CONFIGFS_ATTR(crtc_, writeback);

drivers/gpu/drm/vkms/vkms_output.c

17

int writeback;

drivers/gpu/drm/vkms/vkms_output.c

45

writeback = vkms_enable_writeback_connector(vkmsdev, crtc_cfg->crtc);

drivers/gpu/drm/vkms/vkms_output.c

46

if (writeback)

drivers/gpu/drm/xe/xe_bo.c

1079

.writeback = false,

drivers/gpu/drm/xe/xe_bo.c

1166

.writeback = flags.writeback,

drivers/gpu/drm/xe/xe_bo.h

437

u32 writeback : 1;

drivers/gpu/drm/xe/xe_shrinker.c

112

save_flags.writeback = false;

drivers/gpu/drm/xe/xe_shrinker.c

128

if (flags.writeback) {

drivers/gpu/drm/xe/xe_shrinker.c

212

.writeback = !ctx.no_wait_gpu && (sc->gfp_mask & __GFP_IO),

drivers/iommu/virtio-iommu.c

177

if (req->writeback && len == write_len)

drivers/iommu/virtio-iommu.c

178

memcpy(req->writeback, req->buf + req->write_offset,

drivers/iommu/virtio-iommu.c

219

bool writeback)

drivers/iommu/virtio-iommu.c

239

if (writeback) {

drivers/iommu/virtio-iommu.c

240

req->writeback = buf + write_offset;

drivers/iommu/virtio-iommu.c

84

void *writeback;

drivers/md/bcache/movinggc.c

104

op->writeback = KEY_DIRTY(&io->w->key);

drivers/md/bcache/request.c

1014

s->iop.writeback = true;

drivers/md/bcache/request.c

1029

} else if (s->iop.writeback) {

drivers/md/bcache/request.c

1311

s->iop.writeback = true;

drivers/md/bcache/request.c

176

if (op->writeback)

drivers/md/bcache/request.c

224

op->writeback))

drivers/md/bcache/request.c

232

if (op->writeback) {

drivers/md/bcache/request.c

256

BUG_ON(op->writeback);

drivers/md/bcache/request.c

313

op->writeback, op->bypass);

drivers/md/bcache/request.c

666

if (unlikely(s->iop.writeback &&

drivers/md/bcache/request.c

997

s->iop.writeback = true;

drivers/md/bcache/request.h

21

unsigned int writeback:1;

drivers/md/dm-cache-target.c

290

atomic_t writeback;

drivers/md/dm-cache-target.c

986

atomic_inc(&stats->writeback);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

559

if (pipe->output->writeback)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

909

if (cfg->writeback.pixelformat) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

910

const struct vsp1_du_writeback_config *wb_cfg = &cfg->writeback;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

921

pipe->output->writeback = true;

drivers/media/platform/renesas/vsp1/vsp1_rwpf.h

64

bool writeback;

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

254

if (!pipe->iif && (!pipe->lif || wpf->writeback)) {

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

358

if (wpf->writeback) {

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

361

wpf->writeback = false;

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

365

wpf->writeback ? VI6_WPF_WRBCK_CTRL_WBMD : 0);

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

431

if (pipe->lif && !wpf->writeback)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

525

wpf->writeback = false;

drivers/perf/starfive_starlink_pmu.c

120

STARLINK_EVENT_ATTR(writeback, CACHE_WRITEBACK),

fs/binfmt_elf.c

1709

if (regset->writeback)

fs/binfmt_elf.c

1710

regset->writeback(task, regset, 1);

fs/btrfs/compression.c

1021

cb->writeback = true;

fs/btrfs/compression.c

298

if (cb->writeback)

fs/btrfs/compression.c

328

ASSERT(!cb->writeback);

fs/btrfs/compression.c

354

cb->writeback = false;

fs/btrfs/compression.h

58

bool writeback;

fs/btrfs/subpage.c

446

writeback, start, len);

fs/btrfs/subpage.c

470

writeback, start, len);

fs/btrfs/subpage.c

475

if (subpage_test_bitmap_all_zero(fs_info, folio, writeback)) {

fs/btrfs/subpage.c

562

IMPLEMENT_BTRFS_SUBPAGE_TEST_OP(writeback);

fs/btrfs/subpage.c

658

IMPLEMENT_BTRFS_PAGE_OPS(writeback, folio_start_writeback, folio_end_writeback,

fs/btrfs/subpage.c

796

GET_SUBPAGE_BITMAP(fs_info, folio, writeback, &writeback_bitmap);

fs/btrfs/subpage.h

183

DECLARE_BTRFS_SUBPAGE_OPS(writeback);

fs/buffer.c

103

*writeback = true;

fs/buffer.c

108

*writeback = true;

fs/buffer.c

90

bool *dirty, bool *writeback)

fs/buffer.c

94

*writeback = false;

fs/ceph/caps.c

3504

bool writeback = false;

fs/ceph/caps.c

3707

writeback = true; /* initiate writeback; will delay ack */

fs/ceph/caps.c

3786

if (writeback)

fs/f2fs/data.c

3531

atomic_inc(&F2FS_I(inode)->writeback);

fs/f2fs/data.c

3533

atomic_dec(&F2FS_I(inode)->writeback);

fs/f2fs/data.c

685

nid_t ino, enum page_type type, bool writeback)

fs/f2fs/data.c

708

if (writeback)

fs/f2fs/f2fs.h

1003

atomic_t writeback; /* count # of writeback thread */

fs/f2fs/f2fs.h

4780

if (f2fs_is_mmap_file(inode) || atomic_read(&fi->writeback) ||

fs/f2fs/file.c

2142

atomic_read(&fi->writeback) ||

fs/f2fs/super.c

1810

atomic_set(&fi->writeback, 0);

fs/f2fs/super.c

2688

long long start, writeback, end;

fs/f2fs/super.c

2729

writeback = ktime_get();

fs/f2fs/super.c

2757

ktime_ms_delta(writeback, start),

fs/f2fs/super.c

2758

ktime_ms_delta(end, writeback));

fs/fuse/file.c

1480

bool writeback = false;

fs/fuse/file.c

1491

writeback = true;

fs/fuse/file.c

1512

} else if (writeback) {

fs/nfs/client.c

1084

atomic_long_set(&server->writeback, 0);

fs/nfs/file.c

522

bool *dirty, bool *writeback)

fs/nfs/file.c

534

*writeback = true;

fs/nfs/write.c

291

if (atomic_long_inc_return(&nfss->writeback) > NFS_CONGESTION_ON_THRESH)

fs/nfs/write.c

300

if (atomic_long_dec_return(&nfss->writeback) <

fs/orangefs/waitqueue.c

324

int writeback = flags & ORANGEFS_OP_WRITEBACK,

fs/orangefs/waitqueue.c

333

if (writeback)

fs/orangefs/waitqueue.c

335

else if (!writeback && interruptible)

fs/proc/task_mmu.c

3124

unsigned long writeback;

fs/proc/task_mmu.c

3158

md->writeback += nr_pages;

fs/proc/task_mmu.c

3362

if (md->writeback)

fs/proc/task_mmu.c

3363

seq_printf(m, " writeback=%lu", md->writeback);

include/drm/ttm/ttm_backup.h

63

bool writeback, pgoff_t idx, gfp_t page_gfp,

include/drm/ttm/ttm_bo.h

244

u32 writeback : 1;

include/drm/ttm/ttm_tt.h

292

u32 writeback : 1;

include/linux/buffer_head.h

189

bool *dirty, bool *writeback);

include/linux/nfs_fs_sb.h

152

atomic_long_t writeback; /* number of writeback pages */

include/linux/page-flags.h

597

TESTPAGEFLAG(Writeback, writeback, PF_NO_TAIL)

include/linux/page-flags.h

598

TESTSCFLAG(Writeback, writeback, PF_NO_TAIL)

include/linux/regset.h

209

user_regset_writeback_fn *writeback;

include/media/vsp1.h

117

struct vsp1_du_writeback_config writeback;

include/trace/events/bcache.h

153

bool writeback, bool bypass),

include/trace/events/bcache.h

154

TP_ARGS(c, inode, bio, writeback, bypass),

include/trace/events/bcache.h

162

__field(bool, writeback )

include/trace/events/bcache.h

172

__entry->writeback = writeback;

include/trace/events/bcache.h

179

__entry->nr_sector, __entry->writeback, __entry->bypass)

include/trace/events/mmflags.h

157

DEF_PAGEFLAG_NAME(writeback), \

include/trace/events/writeback.h

3

#define TRACE_SYSTEM writeback

mm/page-writeback.c

858

unsigned long filepages = 0, headroom = 0, writeback = 0;

mm/page-writeback.c

861

&writeback);

mm/page-writeback.c

863

dtc->dirty += writeback;

mm/vmscan.c

1106

bool dirty, writeback;

mm/vmscan.c

1150

folio_check_dirty_writeback(folio, &dirty, &writeback);

mm/vmscan.c

1151

if (dirty || writeback)

mm/vmscan.c

1154

if (dirty && !writeback)

mm/vmscan.c

1163

if (writeback && folio_test_reclaim(folio))

mm/vmscan.c

174

unsigned int writeback;

mm/vmscan.c

2070

sc->nr.writeback += stat.nr_writeback;

mm/vmscan.c

4439

bool dirty, writeback;

mm/vmscan.c

4490

writeback = folio_test_writeback(folio);

mm/vmscan.c

4493

if (!writeback)

mm/vmscan.c

4498

if (writeback || (type == LRU_GEN_FILE && dirty)) {

mm/vmscan.c

6093

if (sc->nr.writeback && sc->nr.writeback == sc->nr.taken)

mm/vmscan.c

955

bool *dirty, bool *writeback)

mm/vmscan.c

969

*writeback = false;

mm/vmscan.c

975

*writeback = folio_test_writeback(folio);

mm/vmscan.c

983

mapping->a_ops->is_dirty_writeback(folio, dirty, writeback);