write_counter
void (*write_counter)(unsigned int idx, u64 val);
loongarch_pmu.write_counter(idx, loongarch_pmu.overflow - left);
loongarch_pmu.write_counter(n, 0);
loongarch_pmu.write_counter = loongarch_pmu_write_counter;
mipspmu.write_counter = mipsxx_pmu_write_counter_64;
mipspmu.write_counter = mipsxx_pmu_write_counter;
mipspmu.write_counter(idx, mipspmu.overflow - left);
void (*write_counter)(unsigned int idx, u64 val);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(0, 0);
mipspmu.write_counter(3, 0);
mipspmu.write_counter(2, 0);
mipspmu.write_counter(1, 0);
mipspmu.write_counter(0, 0);
write_counter(t * (k + 1) + base,
write_counter(read_counter(&hpet->hpet_mc),
write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
write_counter(t, &timer->hpet_compare);
write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
write_counter(0L, &hpet->hpet_mc);
.write_counter = omap_dm_timer_write_counter,
u32 write_counter;
next_entry = read.write_counter;
cpu_pmu->write_counter = m1_pmu_write_counter;
armpmu->write_counter(event, (u64)(-left) & max_period);
cpu_pmu->write_counter = armv8pmu_write_counter;
cpu_pmu->write_counter = armv6pmu_write_counter;
cpu_pmu->write_counter = armv7pmu_write_counter;
cpu_pmu->write_counter = xscale1pmu_write_counter;
cpu_pmu->write_counter = xscale2pmu_write_counter;
.write_counter = hisi_cpa_pmu_write_counter,
.write_counter = hisi_ddrc_pmu_write_counter,
.write_counter = hisi_hha_pmu_write_counter,
.write_counter = hisi_l3c_pmu_write_counter,
.write_counter = hisi_mn_pmu_write_counter,
.write_counter = hisi_noc_pmu_write_counter,
.write_counter = hisi_pa_pmu_write_counter,
hisi_pmu->ops->write_counter(hisi_pmu, hwc, val);
hisi_pmu->ops->write_counter(hisi_pmu, hwc, prev_raw_count);
void (*write_counter)(struct hisi_pmu *, struct hw_perf_event *, u64);
.write_counter = hisi_sllc_pmu_write_counter,
.write_counter = hisi_uc_pmu_write_counter,
xgene_pmu->ops->write_counter(pmu_dev, GET_CNTR(event),
void (*write_counter)(struct xgene_pmu_dev *pmu, int idx, u64 val);
.write_counter = xgene_pmu_write_counter32,
.write_counter = xgene_pmu_write_counter64,
xgene_pmu->ops->write_counter(pmu_dev, hw->idx, val);
omap->pdata->write_counter(omap->dm_timer, DM_TIMER_LOAD_MIN);
!pdata->write_counter) {
void (*write_counter)(struct perf_event *event, u64 val);
int (*write_counter)(struct omap_dm_timer *timer,
__be32 write_counter;
__be32 write_counter;