write_cmd
hdc->write_cmd = hd44780_write_cmd_gpio8;
hdc->write_cmd = hd44780_write_cmd_gpio4;
write_cmd_raw = hdc->write_cmd;
hdc->write_cmd(hdc,
hdc->write_cmd(hdc, LCD_CMD_DISPLAY_CTRL);
hdc->write_cmd(hdc,
hdc->write_cmd(hdc, LCD_CMD_ENTRY_MODE | LCD_CMD_CURSOR_INC);
hdc->write_cmd(hdc, LCD_CMD_SHIFT);
hdc->write_cmd(hdc,
hdc->write_cmd(hdc, LCD_CMD_SHIFT | LCD_CMD_DISPLAY_SHIFT);
hdc->write_cmd(hdc, LCD_CMD_SHIFT | LCD_CMD_DISPLAY_SHIFT |
hdc->write_cmd(hdc,
hdc->write_cmd(hdc,
hdc->write_cmd(hdc, LCD_CMD_SET_CGRAM_ADDR | (cgaddr * 8));
hdc->write_cmd(hdc, LCD_CMD_SET_DDRAM_ADDR | addr);
hdc->write_cmd(hdc, LCD_CMD_DISPLAY_CLEAR);
void (*write_cmd)(struct hd44780_common *hdc, int cmd);
hdc->write_cmd = lcd_write_cmd_s;
hdc->write_cmd = lcd_write_cmd_p8;
hdc->write_cmd = lcd_write_cmd_tilcd;
write_cmd(kcs, KCS_WRITE_START);
write_cmd(kcs, KCS_WRITE_START);
write_cmd(kcs, KCS_WRITE_END);
write_cmd(kcs, KCS_WRITE_END);
write_cmd(kcs, KCS_GET_STATUS_ABORT);
struct gpib_read_write_ioctl write_cmd;
fault = copy_from_user(&write_cmd, (void __user *)arg, sizeof(write_cmd));
if (write_cmd.completed_transfer_count > write_cmd.requested_transfer_count)
userbuf = (u8 __user *)(unsigned long)write_cmd.buffer_ptr;
userbuf += write_cmd.completed_transfer_count;
remain = write_cmd.requested_transfer_count - write_cmd.completed_transfer_count;
desc = handle_to_descriptor(file_priv, write_cmd.handle);
send_eoi = remain <= board->buffer_length && write_cmd.end;
write_cmd.completed_transfer_count = write_cmd.requested_transfer_count - remain;
fault = copy_to_user((void __user *)arg, &write_cmd, sizeof(write_cmd));
write_cmd(pfdev, as_nr, AS_COMMAND_LOCK);
write_cmd(pfdev, as_nr, op);
write_cmd(pfdev, as_nr, AS_COMMAND_UPDATE);
write_cmd(pfdev, as_nr, AS_COMMAND_UPDATE);
u8 write_cmd;
write_cmd = adm1266_gpio_mapping[i][1];
ret = adm1266_pmbus_block_xfer(data, ADM1266_GPIO_CONFIG, 1, &write_cmd, read_buf);
write_cmd = 0xFF;
ret = adm1266_pmbus_block_xfer(data, ADM1266_PDIO_CONFIG, 1, &write_cmd, read_buf);
int write_cmd = loc | (EE_WRITE_CMD << ADDR_LEN);
solo_eeprom_cmd(solo_dev, write_cmd);
map_word status, write_cmd;
write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0x40) : CMD(0x41);
write_cmd = CMD(0xc0);
map_write(map, write_cmd, adr);
map_word status, write_cmd, datum;
write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0xe8) : CMD(0xe9);
map_write(map, write_cmd, cmd_adr);
err = priv->write_cmd(priv);
int (*write_cmd)(struct peak_canfd_priv *priv);
priv->ucan.write_cmd = pciefd_write_cmd;
int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
u32 data_array_base, u32 write_cmd,
write_cmd))
write_cmd))
struct ixgbe_hic_internal_phy_req write_cmd;
memset(&write_cmd, 0, sizeof(write_cmd));
write_cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;
write_cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;
write_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;
write_cmd.port_number = hw->bus.lan_id;
write_cmd.command_type = FW_INT_PHY_REQ_WRITE;
write_cmd.address = cpu_to_be16(reg_addr);
write_cmd.write_data = cpu_to_be32(data);
return ixgbe_host_interface_command(hw, &write_cmd, sizeof(write_cmd),
int write_cmd = location | (EE_WRITE_CMD << addr_len);
eeprom_cmd(ee_addr, write_cmd, 3 + addr_len);
htt_stats_buf->write_cmd);
htt_stats_buf->write_cmd);
u32 write_cmd;
u32 write_cmd;
le32_to_cpu(htt_stats_buf->write_cmd));
__le32 write_cmd;
u32 write_cmd;
write_cmd = RTW_SEC_CMD_WRITE_ENABLE | RTW_SEC_CMD_POLLING;
command = write_cmd | (addr + i);
u32 write_cmd;
write_cmd = RTW_SEC_CMD_WRITE_ENABLE | RTW_SEC_CMD_POLLING;
command = write_cmd | addr;
ctrl->write_cmd = spmi_write_cmd;
ctrl->write_cmd = spmi_write_cmd;
ctrl->write_cmd = pmif_spmi_write_cmd;
ctrl->write_cmd = pmic_arb_write_cmd;
u32 read_cmd, read_offset, write_cmd, write_offset;
len, &write_cmd, &write_offset);
rc = pmic_arb_write_cmd_unlocked(ctrl, write_cmd, write_offset, sid,
if (!ctrl || !ctrl->write_cmd || ctrl->dev.type != &spmi_ctrl_type)
ret = ctrl->write_cmd(ctrl, opcode, sid, addr, buf, len);
int (*write_cmd)(struct spmi_controller *ctrl, u8 opcode,